-
xiaomi
新版 小米抢购器 -源码
已经测试,代码很有用,已经抢了好几个小米3了,希望对大家有用(The new millet to snap up- source
Have test, the code is useful, has robbed several millet 3, hope useful for everyone)
- 2014-01-08 18:26:40下载
- 积分:1
-
lesson38_lcd1602_clander
基于Verilog语言编写的LCD1602显示的日历程序,类似时钟功能值得参考。(LCD1602 shows calendar program based on Verilog language, similar clock function is worth reference.)
- 2019-05-26 09:29:18下载
- 积分:1
-
DDS_Dual_ports Verilog实现
DDS_Dual_ports Verilog实现,需要的可以下载实验,也可根据自身的需要修改,以求达到自身的目的
- 2022-02-26 19:19:42下载
- 积分:1
-
s29gl256s
说明: s29gl256s nor flash 源代码(s29gl256s device source code)
- 2019-03-03 11:46:03下载
- 积分:1
-
addersubtractor
AVIAddXSubs是一个简单易用的免费程序,用于转换原始srt文件的字幕视频。如果您的硬件播放机无法直接从srt显示字幕,或者即使这样做,结果也不令人满意,那么它的服务将非常有用。使用AVIAddXSubs并转换srt,您可以使用多种选项来配置有关字体、字体大小的字幕;
- 2023-08-03 16:50:02下载
- 积分:1
-
I2C_CSDN
verilog 编写的I2C程序,控制D/A的(I2C program written by Verilog to control D/A)
- 2020-06-18 21:20:02下载
- 积分:1
-
LED-clock-display
利用单片机控制LED时钟显示,以及闹钟,程序较大,但比较简单易懂。(LED clock display)
- 2013-03-10 10:15:37下载
- 积分:1
-
spi
SPI的Verilog实现(非常的全面和详细,还带有SPI算法的注解)(SPI in Verilog implementation (a very comprehensive and detailed, but also with the SPI algorithm annotation))
- 2011-06-30 11:21:04下载
- 积分:1
-
zzlB
QUARTUSII 9.0 下的三级流水线中值滤波工程,vhdl源程序等。可用于fpga做图像预处理。(the three stage pipeline median filter project under QUARTUSII 9 , VHDL source program. which can be used by FPGA to do image preprocessing.
)
- 2011-12-21 16:17:41下载
- 积分:1
-
uartverilog
实现FPGA多字节的稳定串口通信,改编自特权同学的FPGA代码(Realize the stable serial communication of multi-byte FPGA and adapt the FPGA code from Quan via Quartus by Verilog)
- 2020-11-16 08:39:40下载
- 积分:1