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vhdl
说明: 这个事VHDL基础知识,内面主要内容是编码器的插V过程,值得下载学习!(it is really useful for those who never touch it!)
- 2010-04-16 13:57:35下载
- 积分:1
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基于FPGA的DDS设计
应用Verilog进行编写的四种波形发生的程序,并结合DE2板与DVCC实验板上的D/A转换器在示波器上显示出了波形。初步了解Verilog的编程及DE2板的应用,加强对其实际应用的操作。
- 2022-11-08 06:00:02下载
- 积分:1
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Verilog-shift-mulfunction
FPGA verilog 实现任意位宽的移位相乘法,有符号小数或者有符号整数相乘。函数调用方式(FPGA verilog achieve any bit-wide shift multiplication , signed or signed decimal integer multiplication . Function call
)
- 2014-06-21 17:08:12下载
- 积分:1
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SMBUS总线的verilog实现
实现两个状态机和不同的数据传输方式,按照smbus总线的要求进行调节每位的传输,从起始位到终值位,能够较好的实现
- 2022-03-25 14:06:09下载
- 积分:1
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LMS算法FPGA仿真
自适应滤波器算法LMS ,的FPGA实现,采用VERILOG实现。(LMS, an adaptive filter algorithm, is implemented on FPGA and VERILOG.)
- 2020-06-24 01:00:02下载
- 积分:1
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VerilogHDL_advanced_digital_design_code_Ch4
Verilog HDL 高级数字设计源码 _chapter4(Advanced Digital Design Verilog HDL source _chapter4)
- 2007-11-27 10:10:43下载
- 积分:1
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codic
8级cordic 算法verilog (8 cordic algorithm verilog)
- 2013-08-21 11:31:46下载
- 积分:1
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Source
I2C 控制器的 Verilog源程序2(I2C controller Verilog source 2)
- 2008-12-10 16:05:13下载
- 积分:1
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Interpolator-of-polyphase-filter
代码用两种方法设计了一个基于多相滤波的内插器,低通滤波器采用128阶凯撒窗,内插倍数32,并且给定信号范围,验证了内插器的正确性,画出了内插前后信号的频谱。(The code design the interpolator based on polyphase filter using two methods.The low pass filter is 128 order Caesar window and interpolation multiple is 32.I give the range of the signal to verify the interpolator and plot the spectrum of the signal before and after the interpolator. )
- 2021-01-09 13:18:51下载
- 积分:1
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PCI_Master
pci协议主模块开发实用代码, 适合初级学习者使用 很不错(pci agreement to develop practical code, very good for junior learners)
- 2013-01-10 14:48:24下载
- 积分:1