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code
adder 18b trong chuong trinh verilog
- 2017-11-26 14:34:56下载
- 积分:1
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usbd_ucos
说明: 基于ALINX AX7020硬件平台的USB-OTG通信程序。操作系统采用uCOS III v1.41,基本实现了双向USB2.0 块传输(Bulk Transfer)通信,zynq的PS端接收USB数据并回传至主机。经测试,主机端Window10系统采用libUSBK编程时,采用64字节的块时,传输速率可达210Mbps。zynq开发工具为Vivado2015.4,程序包中包含了全部的硬件和软件工程文档。(A USB-OTG communication project where an AX7020 platform is employed as USB device. The embeded operating system is uCOS III of version 1.41, and the FPGA toolchain is Vivado 2015.4. This project implements a full speed bidirectional USB2.0 bulk transfer. A test on Windows 10 host with libUSBK shows that the transfer speed is up to 201Mbps.)
- 2020-09-09 09:38:02下载
- 积分:1
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verilog2
Learning Verilog Chinese Version Part 2
- 2012-06-15 03:24:15下载
- 积分:1
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performance-of-pcie
本白皮书探讨了在PCI Express的因素
技术可能会影响性能。它还
提供指导如何估算
的系统性能。(This white paper explores the factors in PCI Express technology may affect performance. It also provides guidance on how to estimate the system performance.)
- 2013-10-29 10:52:43下载
- 积分:1
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PulseWidth_detector_VHDL
通信控制中常用的脉冲宽度检测程序,VHDL模块化编成实现(原创)(communication control used in pulse width detection procedures, VHDL modular organization to achieve (original))
- 2007-03-28 17:41:46下载
- 积分:1
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(Avalon-ST)-interface_from_liu
IP 核的接口(The Avalon® Streaming (Avalon-ST) interface)的使用说明,和程序(IP core interface (The Avalon Streaming (Avalon-ST) interface) instructions for use, and procedures)
- 2012-09-16 13:41:57下载
- 积分:1
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simple_cpu
初学cpu结构的很好的verilog代码的示例,适合初学者(novice cpu structure of the good verilog code examples for beginners)
- 2007-03-03 01:05:16下载
- 积分:1
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I2C_code
与IP核配套的I2C-Master Core,包含了目前主流FPGA芯片的I2C实现,代码包括Altera/Xilinx/OpenCore等公司的VHDL/Verilog/C等。(I2C-Master Core)
- 2010-05-22 22:12:26下载
- 积分:1
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LineBuffer
此代码由 Altera 演示,并已对其进行修改(版权所有 ︰ Altera)
- 2022-03-20 04:11:56下载
- 积分:1
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lbs_fpga_upld
利用FPGA实现与powerpc的localbus数据接口代码。用verilog实现(localbus interface with PowerPC using Verilog)
- 2020-11-25 22:59:38下载
- 积分:1