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frequency-digital-phase-measuring-
低频数字式相位测量仪，数码管显示相位差，精度为0.1(Low frequency digital phase measuring instrument, digital pipe display phase difference
)
- 2011-08-10 00:45:49下载
- 积分：1
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VHDL-Code-For-Full-Adder-By-Data-Flow-Modelling
VHDL Code For Full Adder By Data Flow Modelling
- 2013-11-08 00:39:04下载
- 积分：1
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HalfbandDec
基于FPGA开发的11阶半带升余弦FIR滤波器，用在阅读器基带滤波时的抽取滤波器使用，采用verilog语言实现。(Raised cosine FIR filter based FPGA development 11 order of half-band decimation filter used in reader baseband filtering, using verilog language implementation.)
- 2012-10-25 11:18:40下载
- 积分：1
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用VHDL编写的RS232串口的通信程序
用VHDL编写的RS232串口的通信程序-Written with the VHDL serial RS232 communication program
- 2022-05-06 01:41:31下载
- 积分：1
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oooo
基于fpga和51单片机的等精度频率计，通过fpga对信号进行采集，数据传给单片机计算，再由12864进行显示，可进行频率，周期，脉宽，占空比，幅值等的测量。(Fpga and 51 microcontroller based precision frequency meter, through fpga for signal acquisition, data to the microcontroller to calculate, and then by 12864 for display, can be measured frequency, period, pulse width, duty cycle, the amplitude and the like.)
- 2014-11-13 19:02:07下载
- 积分：1
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cpu
cache，实现了部分简单指令，仿真模拟确认可行(Single-cycle CPU, to achieve some simple instruction, simulation confirm feasible)
- 2015-01-05 14:11:10下载
- 积分：1
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fpga实例程序代码
关于FPGA的一些例程，包括CORDIC数字计算机的设计，RS(204,188)译码器的设计等。(Some routines on FPGA include the design of CORDIC digital computers, the design of RS (204188) decoders, etc.)
- 2018-07-21 19:08:25下载
- 积分：1
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fir_vivado
此压缩包里面有基于vivado平台的工程，包括了正弦信号的产生，还有fir滤波器的设计以及fft算法的设计实现(in this package,there are three projects of
the generation of the signal of sin and the
design of fir filter and the ari)
- 2016-09-18 15:00:22下载
- 积分：1
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步进电机控制程序，用vhdl实现。可实现电机的正反转控制
步进电机控制程序，用vhdl实现。可实现电机的正反转控制-Stepper motor control program, using vhdl implementation. Positive inversion of motor control can be realized
- 2022-03-03 18:23:56下载
- 积分：1
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LnE
verilog写的LnE算法，可用于计算指数和对数(Verilog written in LnE algorithm, can be used to calculate the index and the logarithm)
- 2020-06-30 04:40:02下载
- 积分：1
