登录
首页 » VHDL » Verilog languages with four arithmetic logic unit ALU, functional reference to 7...

Verilog languages with four arithmetic logic unit ALU, functional reference to 7...

于 2023-07-06 发布 文件大小:2.38 kB
0 95
下载积分: 2 下载次数: 1

代码说明:

用verilog语言编写的4位算术逻辑单元ALU,功能参考74181,包含.v文件以及测试用.vwf文件-Verilog languages with four arithmetic logic unit ALU, functional reference to 74,181, including. V documents and testing. Vwf document

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • 编写 4 x 1 多路复用器使用下列方法 (1) If else 语句 (3) 具有声明 (2) Case 语句的 VHDL 代码
    编写 VHDL 代码为 4 x 1 多路复用器,使用下面的方法 (1) if else 语句 (2) case 语句 (3) 与声明
    2022-02-06 00:17:34下载
    积分:1
  • timblogiw
    timblogiw.c timberdale FPGA LogiWin Video In driver.
    2015-04-21 10:34:21下载
    积分:1
  • Modulator70
    个人参与的某国家工程并行排序MATLAB程序,用于FPGA的RTLAB仿真,使用Simulink工具生成HDL代码。测试可用。(Individuals involved in sort of a national engineering parallel MATLAB programs for the FPGA RTLAB simulation, using the Simulink tool to generate HDL code. Test available.)
    2011-07-29 15:16:30下载
    积分:1
  • verilog full case and paralel case directive usage
    verilog full case and paralel case directive usage
    2022-05-28 07:00:24下载
    积分:1
  • 在QuartusII运用AHDL语言,首先设计出PN发生器来产生一个11位的数据流在整个周期内有效数据有 =2047位;再设计状态机用来检测串行数据流中的序列。...
    在QuartusII运用AHDL语言,首先设计出PN发生器来产生一个11位的数据流在整个周期内有效数据有 =2047位;再设计状态机用来检测串行数据流中的序列。运用两个个计数器分别对PN码计数以及序列出现的次数计数。改变PN码结构可以作为通用数列检测器-QuartusII use in AHDL language, the first PN generator designed to generate a data stream 11 throughout the cycle has an effective data = 2047 re-designing the state machine used to detect the serial data stream in sequence. The use of two counters were counting on the PN code, as well as counting the number of sequences occur. Changes in the structure of PN code series can be used as general-purpose detector
    2023-03-11 09:20:03下载
    积分:1
  • 0720_03_AD_uart
    基于fpga的verilog实现ad及uart,并进行仿真验证(Verilog based on FPGA implements AD and uart, and carries out simulation verification)
    2019-01-21 20:52:46下载
    积分:1
  • atomicops_internals_mips_gcc
    Protocol Buffers - Google s data interchange format.
    2015-10-07 09:49:45下载
    积分:1
  • 电子时钟
    基于DE2-115的数字时钟 1.液晶显示,数码管显示 2.整点报时 3.闹钟 4.设置时间 5.设置闹钟(Digital clock based on DE2-115 1. LCD display, digital tube display 2. whole point 3. alarm clock 4. setting time 5. set the alarm clock)
    2021-03-06 23:39:29下载
    积分:1
  • RDA1846
    rda1846 + pic18f2552 usb circuit schematic.
    2012-09-12 20:05:38下载
    积分:1
  • fft-matlab
    FFT的MATLAB实现。非常完整的实现FFT过程,速度很快。(The FFT in MATLAB. Contains more than one source, the FFT process. Learning Reference essential)
    2012-10-27 16:07:24下载
    积分:1
  • 696518资源总数
  • 105885会员总数
  • 31今日下载