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vhdl
vhdl常见小实验代码，包括二进制比较器，4选1,8421十进制，8421转化成格雷码，8421余三码，分频器，数据码译码器，二进制减计数器，四位环形计数器等(VHDL common small experiment code)
- 2020-06-24 13:00:02下载
- 积分：1
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异步FIFO的verilog代码
本代码是异步FIFO的VERILOG HDL代码，代码除了实现基本的异步FIFO跨时钟域数据传输以外，代码简单易读，可以作为笔试或者面试手写代码的备考代码，本人华为FPGA逻辑开发工程师岗位面试手写的异步FIFO程序就是出自本代码
- 2022-02-14 17:26:59下载
- 积分：1
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clock
EDA用maxplus2开发设计的简易数字钟，适合初学者，vhdL语言(EDA maxplus2 in development and design of simple digital clock, is suitable for beginners, vhdL language
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- 2011-10-03 20:50:23下载
- 积分：1
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DE2_70_TV
de2 70 开发板的演示程序，verilog语言编写，视频输入输出(de2 70 development board demo program, verilog language written, video input and output)
- 2013-04-09 19:29:51下载
- 积分：1
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单片机课程设计——交通灯_1
一个交通灯设计,简单的实现，没有添加其他的显示管(Traffic Light System)
- 2020-06-21 10:40:02下载
- 积分：1
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程序
传感器是一种检测装置，能感受到被测量的信息，并能将感受到的信息，按一定规律变换成为电信号或其他所需形式的信息输出，以满足信息的传输、处理、存储、显示、记录和控制等要求(Sensor is a kind of detection device, which can sense the measured information and transform it into electrical signal or other required information output according to certain rules to meet the requirements of information transmission, processing, storage, display, recording and control.)
- 2020-06-18 22:00:01下载
- 积分：1
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12
说明： 用FPGA进行等精度频率和相位差测量的程序，本程序是在EPEC6Q240C8下的程序(Carried out with the FPGA such as the frequency and phase measurement precision of the procedure, this procedure was the procedure under the EPEC6Q240C8)
- 2010-03-03 17:42:11下载
- 积分：1
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ReliabilityByFORM
first order reliability method
- 2014-07-21 16:59:32下载
- 积分：1
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pid_controler_latest.tar
PID控制器的verilog实现，做闭环控制器的人可以参考(PID controller verilog implementation of closed-loop controller may make reference to)
- 2010-10-23 17:09:15下载
- 积分：1
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frequency
数字频率计，测量范围0-1GHZ,测周测频自动转换，精度极高，花了很长时间，不过还是有一点点小问题，有待改进.(Digital frequency meter, range 0-1GHZ, automatic conversion measured weekly frequency measurement, high precision, took a long time, but still a little small problems to be improved.)
- 2011-08-11 00:51:18下载
- 积分：1
