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HDLC

于 2009-12-29 发布 文件大小:5KB
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下载积分: 1 下载次数: 72

代码说明:

  hdlc设计,包括flag检测,插0、串并转换等设计,采用verilog编程。(hdlc design, using verilog)

文件列表:

rtl
...\FCS_Generator.v
...\Flag_Abort.v
...\Parallel_Serial.v
...\Transmitter.v
...\Transmit_Control.v
...\Transmit_Control.v~
...\Zero_Insertion.v

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