SD_Controller_Verilog

代码说明：

说明：  该程序包是SD卡/MMC卡控制器SDC的verilog语言包，它包括以下4部分：RTL源代码，测试平台，软件仿真文件，说明文件。(This source package is the SD card and MMC card controler model based on the Verilog language. It has the following 4 parts: RTL language, testbench, software simulating files and help document.)

文件列表：

SD_Controller_Verilog
.....................\bench
.....................\.....\sdc_dma
.....................\.....\.......\verilog
.....................\.....\.......\.......\sdModel.v,19838,2010-04-08
.....................\.....\.......\.......\SD_controller_top_tb.v,111119,2010-04-08
.....................\.....\.......\.......\timescale.v,2929,2009-04-29
.....................\.....\.......\.......\htm" target=_blank>transcript,519,2010-08-18
.....................\.....\.......\.......\wb_bus_mon.v,18743,2009-04-29
.....................\.....\.......\.......\wb_master32.v,13486,2009-04-29
.....................\.....\.......\.......\wb_master_behavioral.v,23268,2009-04-29
.....................\.....\.......\.......\wb_model_defines.v,7223,2009-04-29
.....................\.....\.......\.......\wb_slave_behavioral.v,12418,2010-04-08
.....................\doc
.....................\...\Design SDC_MMC controller.pdf,421767,2009-05-07
.....................\...\References
.....................\...\..........\Simplified_Physical_Layer_Spec-1.pdf,1090427,2009-04-27
.....................\...\Specification SDC_MMC controller.pdf,327334,2010-09-01
.....................\rtl
.....................\...\sdc_dma
.....................\...\.......\verilog
.....................\...\.......\.......\Makefile,361,2009-07-02
.....................\...\.......\.......\SD_Bd.v,3735,2009-07-14
.....................\...\.......\.......\SD_clock_divider.v,632,2009-05-07
.....................\...\.......\.......\SD_cmd_master.v,5549,2009-07-01
.....................\...\.......\.......\SD_cmd_serial_host.v,13211,2009-07-14
.....................\...\.......\.......\SD_controller_top.v,14487,2009-07-06
.....................\...\.......\.......\SD_controller_wb.v,9024,2009-07-15
.....................\...\.......\.......\SD_crc_16.v,1476,2009-04-25
.....................\...\.......\.......\SD_crc_7.v,821,2009-04-25
.....................\...\.......\.......\SD_data_host.v,9771,2010-04-08
.....................\...\.......\.......\SD_data_master.v,11802,2010-04-08
.....................\...\.......\.......\SD_defines.v,1527,2010-04-08
.....................\...\.......\.......\SD_FIFO_RX_Filler.v,1566,2009-07-01
.....................\...\.......\.......\SD_FIFO_TX_Filler.v,1772,2010-04-08
.....................\...\sdc_fifo
.....................\...\........\verilog
.....................\...\........\.......\Makefile,447,2009-04-29
.....................\...\........\.......\sd_cmd_phy.v,9678,2009-04-29
.....................\...\........\.......\sd_controller_fifo_actel.v,32279,2009-04-29
.....................\...\........\.......\sd_controller_fifo_wb.v,7120,2009-04-29
.....................\...\........\.......\sd_counter.v,3006,2009-04-21
.....................\...\........\.......\sd_crc_16.v,1434,2009-04-21
.....................\...\........\.......\sd_crc_7.v,818,2009-04-21
.....................\...\........\.......\sd_data_phy.v,10388,2009-04-21
.....................\...\........\.......\sd_defines.v,886,2009-04-21
.....................\...\........\.......\sd_fifo.v,4094,2009-04-21
.....................\...\........\.......\sd_ip_comp_inst.v,896,2009-04-29
.....................\...\........\.......\versatile_fifo_async_cmp.v,2066,2009-04-29
.....................\...\........\.......\versatile_fifo_dptam_dw.v,854,2009-04-29
.....................\sim
.....................\...\rtl_sim
.....................\...\.......\bin
.....................\...\.......\...\FLASH.txt,8190,2009-05-03
.....................\...\.......\...\wb_memory.txt,844508,2010-04-08
.....................\...\.......\log
.....................\...\.......\...\eth_tb_host.log,71,2010-04-08
.....................\...\.......\...\eth_tb_phy.log,71,2010-04-08
.....................\...\.......\...\eth_tb_wb_m_mon.log,117,2010-04-08
.....................\...\.......\...\eth_tb_wb_s_mon.log,117,2010-04-08
.....................\...\.......\...\sdc_tb.log,8422,2010-04-08
.....................\...\.......\...\sd_model.log,185,2010-04-08
.....................\...\.......\...\sd_tb_memory.log,71,2010-04-08
.....................\...\.......\run
.....................\...\.......\...\comp.do,5035,2010-04-08
.....................\...\.......\...\log
.....................\...\.......\...\...\eth_tb_host.log,71,2010-04-08
.....................\...\.......\...\...\eth_tb_phy.log,71,2010-04-08
.....................\...\.......\...\...\eth_tb_wb_m_mon.log,117,2010-04-08
.....................\...\.......\...\...\eth_tb_wb_s_mon.log,117,2010-04-08
.....................\...\.......\...\...\sdc_tb.log,88,2010-04-08
.....................\...\.......\...\...\sd_model.log,0,2010-04-08
.....................\...\.......\...\...\sd_tb_memory.log,71,2010-04-08
.....................\...\.......\...\work
.....................\...\.......\...\....\_info,100,2010-04-08
.....................\...\.......\...\....\_temp
.....................\...\.......\...\....\.....\vlog086ftz,54442,2010-04-08
.....................\sw
.....................\..\sdc_dma
.....................\..\.......\board.h,6675,2009-04-27
.....................\..\.......\BootReset.S,10405,2009-04-27
.....................\..\.......\BootReset.S.lowram,10405,2009-04-27
.....................\..\.......\main.c,11523,2009-04-27
.....................\..\.......\orsocdef.h,5187,2009-04-27
.....................\..\.......\ram.ld,1737,2009-04-27
.....................\..\.......\sd_controller.c,3115,2009-04-27
.....................\..\.......\sd_controller.h,2848,2009-04-27
.....................\..\.......\spr_defs.h,18945,2009-04-27
.....................\..\.......\uart.c,6602,2009-04-27
.....................\..\.......\uart.h,8748,2009-04-27
.....................\..\sdc_fifo
.....................\..\........\main.c,16661,2009-04-29