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VB串口实验me
计算机网络实验做得串口，非原创，只是为了下载方便。(Computer network experiments do serial port, not original, just for download convenience.)
- 2018-12-06 11:10:58下载
- 积分：1
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WSN-matlab-simulation
This is wireless sensor network simulation source
- 2010-03-08 14:43:34下载
- 积分：1
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基于MATLAB的IIR数字滤波器的设计与仿真分析_刘兴
数字信号处理，利用matlab语言仿真，对信号进行滤波。(Digital signal processing, using MATLAB language simulation to filter the signal)
- 2019-04-12 20:59:30下载
- 积分：1
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AddressList
提供通讯录成员的查询、增加、更新及删除等功能。(Provide contacts membership query, add, update, and delete functions.)
- 2013-09-24 19:26:07下载
- 积分：1
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RA
说明： RA码的仿真程序，包括编码器、信道、译码器，参数可配置。(RA code simulation program, including encoder, decoder, channel, parameters can be configured.)
- 2017-11-13 21:31:00下载
- 积分：1
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sim1
Matlab高斯信道条件下采用QPSK和8PSK时点到点通信系统的理论和统计所得的误码率和误比特率曲线。
删余卷积码的Pb性能仿真
加入信道编码模块，绘制误比特率曲线,其中信道为加性高斯白噪声，调试为QPSK；
进行软判决和应判决，和用3/4、7/8删余码进行编码等。(Matlab gaussian channel conditions using QPSK and eight PSK point to point communication system theory and statistical the error rate and bit error rate curve.
Delete the convolution code more than Pb performance simulation
Join channel coding module, draw bit error rate curve, which channel to additive gaussian white noise, commissioning for QPSK
In the soft decision and judgment should be, and with more than 3/4, 7/8 delete code for coding, etc.
)
- 2021-04-07 22:39:01下载
- 积分：1
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Est_Chirps.m
ADMM算法 切普信号的参数估计问题 包括个数估计和频率估计(The parameter estimation of Chep signal based on ADMM algorithm includes number estimation and frequency estimation.)
- 2019-02-27 11:34:25下载
- 积分：1
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Localization_computer
根据手机双麦克风进行定位 ，电脑客户端程序，c++源程序(According to the mobile phone microphone to locate
)
- 2021-04-10 18:08:59下载
- 积分：1
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STM32_IIC
双STM32 主从通讯 主硬件IIc 从采用中断(Two STM32 communication,master use hardware IIc ,slave use interrupt)
- 2018-03-28 22:20:34下载
- 积分：1
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TheResearchAndIPDesignOfSMBusBasedSmartBattery
本文研究了SMBus
规范，介绍了典型的基于片上系统（SoC）设计的知识产权核（IP）实现，采用自顶向下
(Top-down)的集成电路设计方法完成了设计，并架构了基于总线功能模型(BFM)的验证平台
完成功能仿真，顺利完成了逻辑综合和时序仿真。FPGA 验证和投片后测试均表明设计具有
良好的性能。(This paper studies the SMBus specification, based on the introduction of the typical system-on-chip (SoC) intellectual property core design (IP) implementation, using top-down (Top-down) of the integrated circuit design methods achieve a design and architecture based on the total Line functional model (BFM) achieve functional verification platform for simulation, successfully completed a logic synthesis and timing simulation. FPGA silicon validation and post-tests show that the design has good performance.)
- 2009-03-26 12:16:53下载
- 积分：1
