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参考文档

于 2018-12-05 发布 文件大小:3151KB
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代码说明:

  这是关于DSP和FPGA之间通信的SRIO口,能够实现之间的数据传输起一定的参考作用。(This is a SRIO port for communication between DSP and FPGA, which can provide some reference for data transmission between them.)

文件列表:

参考文档\adispi_rev_1p0_customer.pdf, 326991 , 2018-11-21
参考文档\pg007_srio_gen2.pdf, 4352600 , 2018-11-21
参考文档, 0 , 2018-12-05

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