xapp1017-lvds-ddr-deserial

代码说明：

说明：  LVDS Source Synchronous DDR Deserialization (up to 1,600 Mb/s)(xapp1017-lvds-ddr-deserial)

文件列表：

Project, 0 , 2016-03-30
Project\readme.txt, 6186 , 2016-07-22
Project\Uncertainties_ tool_ 1.1.xlsx, 15669 , 2016-03-08
Project\Verilog_macros, 0 , 2016-03-30
Project\Verilog_macros\delay_controller_wrap.v, 16591 , 2016-03-30
Project\Verilog_macros\serdes_1_to_10_idelay_ddr.v, 33301 , 2016-03-30
Project\Verilog_macros\serdes_1_to_468_idelay_ddr.v, 20612 , 2016-03-30
Project\Verilog_testbench, 0 , 2016-03-30
Project\Verilog_testbench\serdes_n_to_1_7_series.v, 13574 , 2016-03-30
Project\Verilog_testbench\tb_top16_ddr_rx.v, 4412 , 2016-03-30
Project\Verilog_top_level_examples, 0 , 2016-03-30
Project\Verilog_top_level_examples\top16_ddr_rx.v, 5917 , 2016-03-30
Project\VHDL_macros, 0 , 2016-03-30
Project\VHDL_macros\delay_controller_wrap.vhd, 18736 , 2016-03-30
Project\VHDL_macros\serdes_1_to_468_idelay_ddr.vhd, 23780 , 2016-03-30
Project\VHDL_testbench, 0 , 2016-03-30
Project\VHDL_testbench\serdes_n_to_1_7_series.vhd, 14668 , 2016-03-30
Project\VHDL_testbench\tb_top16_ddr_rx.vhd, 6771 , 2016-03-30
Project\VHDL_top_level_examples, 0 , 2016-03-30
Project\VHDL_top_level_examples\top16_ddr_rx.vhd, 8556 , 2016-03-30
Project\xdc, 0 , 2016-03-30
Project\xdc\top16_ddr_rx.xdc, 10331 , 2016-03-30