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转速电流双闭环直流调速系统设计与仿真带程序
里面有完备的双闭环直流调速系统的设计文档和仿真程序，欢迎下载。
- 2020-12-05下载
- 积分：1
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ST—FOC4.2电机库全中文指南
STM32-PMSM-SDK-V4.2-使用指南中文版,FOC:高动态性能高频注入法(HFI)无传感器算法 同时控制2个马达STM32 PMSM FOCSDKV42概述life. augmentedSTM32 PMSM FOC SDK V4.2SDKV42软件包包含: PMSMFOC固件库和 ST MC WOrkbench(GUI)允许用户使用STM32进行单或双PMSM马达的FOC的驱动,其支持STM32FOXX, STM32F1Xx, STM32F2XX, STM32F3XXKSTM32F4xXSingle/Dualsimultaneous FocSTM32F3xxSTM32F4XxXSTM32F0XXWide range of motor controlSTM32Flxxalgorithms implemented forSTM32F2xxspecmc applicationsSTM32F PMSM FOC FW libraryST MC WorkbenchMISRA C rules 2004 compliancyFull customization and real timeStrict ANSI C compliancycommunication through PC software整合:软件库+产品(MCU、功率器件等)+应用高端应用,单/双马达控制STM32F4xXI 80MHZ. Cortex-M4FOC:高动态性能高频注入法(HFD)无传感器算法STM32F2XX低CPU负荷,大部分时间用于应120MHZ. Cortcx-M3用软件上STM32F3XX同时控制2个马达72MHZ, Cortex-M4Industrial motorFitness. wellness andFOC MCdriveshealthcare中/低端应用FLib要求:STM32F 10372MHZ Cortex-M32★·FOC矢量控制对马达进行高效控制STM32FOXXames降低马达的噪音:正弦波电流48MHZ Cortex-MO硬件成本优化:1- shunt电流采STM32F100样,无传感器算法24MHZ Cortex-M3FanHome appliances低端应用MC FWSTM8S· Scalar controllib24MHZST core成本敏感应用算法集及MCU支持ST MC FOC SDK V4.2STM32F3XX F4XXSTM32F103X HD/XL F2XSTM32F103X LD/MDSTM32F1OOX STM32FOXXDual MotorshuntSensorlessDebugSTO+PLLTuningshuntControlHFIFluxSensorlessGUIICSMax FOC xMax FocWeakeningSTO+ CORDICsupportF103~23kzF3-30kZF2XX-40kzIPMSMUSARTEncoderFreeRtosF4-50kZMTPAAdd-OnF103. F2XXMaX FocMax focdafoeDual wFeedMax FoCDual xF103~20kHForwardHallF100~11kHz123 kHZF3 27kZFOXX 12 kHZF2XX36KHF4--45kz*:在 sensorless模式下STM32FOC性能指标STM32FSingle motorDual motor@20kHz PWM/10kHz FOCCodeRAMCPUCodeRAMSTM32FCPUConfigurationusageusagesize( Kb)(Kb)load (%Configurationsize(Kb(Kb)load(%)shunt/STM32F10017.82.658.0NANANANAsensorlessshunt/STM32F05x16.72.745.2NANANANAsensorlessshunt/Motor 1&2STM32F103x16.22.521.33 shunt/17,53.949.4sensorlesssensorlessshunt/Motor 182STM32F2x15.52.613.93 shunt/17.53.929.0sensorlesssensorlessshunt/Motor 182STM32F30X16.72.7152(*)3 shunt/18.84.033.3sensorlesssensorlessshunt/Motor 1&2STM32F4x15511.13 shunt/17.53.923.5sensorless2.6sensorless()+8% if with HFISDK FOC V42新增特性life. augmentedFOCV4.2库新增支持芯片新增支持芯片STM32F301x6/x8-STM32F302x6/x8加入STM32F30x的1个ADC模块的三电阻采样算法快速5 MSPS ADC5△ADC高级的数字电路先进的模拟外设比较器PGA-DAC5数字信号处理器微控制器点单元SDK FOC V42新增“ Motor profiler新增自动测试识别电机参数算法测试PMM马达参数:Rs,Ls,Ke测试转动参数:JFElectrical motor parameters有利于无位置传感控制Current regulators tuning快速FOC转动电机DPI没有硬件以及特别设备要求Rs LSMechanical motor parametersSensorless tuningPMSM motorsNew algorithm
- 2021-05-06下载
- 积分：1
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sqlcipher.exe windows客户端
解密sqlite,无需编译,直接运行就可以解密sqlite,无需编译,直接运行就可以
- 2020-12-06下载
- 积分：1
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计算转子——轴承系统不平衡响应
这是用于计算转子——轴承系统不平衡响应的程序，转子用集总参数法简化，轴承支撑为各项同性支撑
- 2020-12-05下载
- 积分：1
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几种不同的图像细化算法源代码
Hilditch细化算法Pavlidis细化算法Rosenfeld细化算法索引表细化算法
- 2020-11-30下载
- 积分：1
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去雨算法（python代码）
主要是用于去除雨点的代码，效果非常好，是用python写的
- 2020-11-30下载
- 积分：1
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SIFT算法MATLAB源码完整版
SIFT算法的MATLAB源码，不使用sift_win32，根据论文一步一步编写，对于学习理解SIFT算法有重要意义。建议单步执行学习。
- 2020-06-19下载
- 积分：1
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matlab 2014b HDL Coder Users Guide
Matlab 官方有关于HDL coder开发的详细技术文档， HDL Coder可以把Simulink模型、MATLAB代码和Stateflow框图生成位真、周期精确、可综合的Verilog和VHDL代码，很适合用于FPGA/ASCI的快速开发，里面还有大量的例程等等ContentsHDL Code generation from MATLaBMATLAB Algorithm DesignData Types and scope1-2Supported data TUsuppyted data type1-3Scope for variables1-3Operators1-4Arithmetic operate1-4Relational operators1-4ogical Operators1-5Control flow statements1-6Vector Function Limitations related to Control1-7PersistentⅤ ariables1-8Persistent Array variables1-10Complex data Type Support1-11Declaring complex signaIs1-11Conversion Between Complex and real signals1-12Support for vectors of Complex Numb1-12ystem Objects1-14Why use System objects?1-14Predefined System Object1-14User-Defined System ob1-14Limitations of HDL Code Generation for SystemObjects1-15System object Examples for HDL Code Generation.. 1-16Predefined System Objects Supported for HDL CodeGeneration1-17Load constants from a mat-file1-18Generate Code for User-Defined System Objects1-19How To Create a User-Defined System object1-1User-Defined System object Example1-19Map Matrices to ROM1-22Fixed-Point bitwise Functions1-231-23Bitwise Functions Supported for HDl Code Generation 1-23Fixed-Point Run-Time Library functions1-29Fixed-Point function limitations1-33Model State with Persistent variables and SysteObjects1-34Bit Shifting and bit rotation1-8Bit Slicing and Bit Concatenation1-41Guidelines for Efficient hdL code1-43MATLAB Design Requirements for HDL CodeGeneration1-44What is a matlab test bench?1-45MATLAB Test Bench Requirements and bestractices1-46MATLAB Test Bench requirements1-46MATLAB Test bench best practices1-46ContentsMATLAB Best Practices and Design Patterns forHDL Code generation2Model a counter for hdl code generation2-2MATLAB Counter2-2MATLAB Code for the counter2-3Best Practices in this Example2-4Model a state machine for HDL Code Generation2-5MATLAB State machinesMATLAB Code for the Mealy State MachineMATLAB Code for the moore state machine2-7Best practic2-9Generate hardware Instances For local functions2-10MATLAB Local functions2-10MATLAB Code for mlhdlc two counters. m2-10Implement RAM USing MATLAB Code2-13Implementation of RAM2-13Implement RAM Using a Persistent Array or Systemobject Properties2-13Implement RAM Using hdl. RAM2-14For-Loop best Practices for HDL Code generation2-16MATLAB Loops2-16Monotonically Increasing Loop Counters2-16Persistent Variables in Loops2-17Persistent Arrays in Loops2-17Fixed-Point Conversion3Floating-Point to Fixed-Point Conversion3-2Fixed-Point Type Conversion and Refinement3-16Working with Generated Fixed-Point Files3-26Specify Type Proposal Options3-33Log Data for Histogram3-37Automated Fixed-Point Conversion3-40License Requirements3-40Automated Fixed-Point Conversion Capabilities3-40Code Coverage3-42Proposing Data Types3-45Locking Proposed Data Types3-47Viewing functions3-47lew1ariables3-48Istogram ...3-54Function Replacements3-56Validating Types3-57g Numerics3-57Detecting Overflows3-57Custom plot functions3-59Visualize Differences Between Floating-Point and Fixed-Point results3-61Inspecting Data Using the Simulation Data Inspector 3-67What Is the Simulation Data Inspecto3-67Import Logged Data3-67Export Logged data3-67Group signals3-67Run options3-68Create Report3-68Comparison Options3-68Enabling Plotting Using the Simulation Data Inspector 3-68Save and Load simulation Data Inspector Sessions3-68Enable Plotting Using the Simulation Data Inspector 3-70From the UI3-70From the Command Line3-70Replacing Functions Using Lookup TableApproximations·3-72Replace a custom function with a lookup Table3-73From the UI3-73i ContentsFrom the Command line3-81Replace the exp Function with a Lookup Table3-84From the ui3-84From the Command line3-92Data Type Issues in Generated Code3-94Enable the highlight Option in a MaTLAB CoderProject3-94Enable the Highlight Option at the Command Line... 3-94Stowaway doubles3-94Stowaway singles3-94Expensive Fixed-Point operations3-94Code GenerationCreate and set Up Your Project4-2Create a New Project4-2Open an Existing ProjectAdd Files to the project4-4Primary Function Input Specification4-6When to Specify Input Properties4-6Why You must Specify Input Properties4-6Properties to Specify4-6Rules for Specifying Properties of Primary Inputs4-8Methods for Defining Properties of Primary Inputs4-8Basic hdl code generation with the workflowAdvisor4-10HDL Code Generation from System Objects4-14Generate Instantiable code for functions4-19How to generate Instantiable Code for Functions4-19Generate Code Inline for Specific Functions4-19Limitations for instantiable code generation forFunctions4-19Integrate Custom HDL Code Into MATLAB Design.. 4-21Define the hdl. Black Box System object4-21Use System object In MATLAB Design Function4-23Generate HDL Code4-23limitations for hdl. black box4-26Enable matLab function block generation4-27Requirements for MaTLAB Function Block Generation 4-27Enable matlab function block generation4-27Results of matlab function block generation4-27System Design with HDL Code Generation fromMATLAB and simulink4-28Generate Xilinx System Generator Black Box Block4-32Requirements for System Generator Black Box BlockGeneration4-32Enable System Generator black Box block GeResults of System Generator Black Box Bloc neration4-32Generation4-33Generate Xilinx System Generator for DsP black boxfrom MATLAB HDL Design4-34Generate HDL Code from MATLAB Code Using theCommand line interface4-40Specify the Clock Enable rate4-45Why specify the clock Enable rate?4-45How to Specify the clock Enable rate4-45Specify Test Bench Clock Enable Toggle rate4-47When to Specify Test Bench Clock Enable Toggle rate4-47How to Specify Test Bench Clock Enable Toggle rate4-47Generate an HDL Coding Standard report fromMATLAB4-49Using the hdl Workflow advisor4-49Using the Command Line4-51Generate an HDL Lint Tool script4-53How To generate an hdl lint Tool Script4-53ContentsGenerate a Board-Independent Ip core from MATLAB 4-55Generate a board-Independent Ip core4-55Requirements and Limitations for IP Core generation4-57Minimize clock enables4-58Using the GUi4-59Using the Command Line4-59Limitations4-59VerificationVerify Code with HDL Test Bench5-2Generate Test bench with file i/oWhen to Use file i/o In Test bench5-5How Test bench generation with file i/o works5-5Test Bench Data files5-5How to generate Test bench with file i/o5-6Limitations When Using File 1/0 In Test Bench5-6DeploymentGenerate Synthesis Scripts6-2Optimization7RAM Mapping7-2Map persistent Arrays and dsp. Delay to RAM7-3How To Enable RaM Mapping7-3RAM Mapping requirements for Persistent Arrays andSystem object PropertiesRAM Mapping Requirements for dsp. Delay Systemob7-6RAM Mapping Comparison for MATLAB Code7-8Pipelining7-9Port registers7-9Input and Output Pipeline registers7-9Variable pipelining7-9Register Inputs and Outputs7-10Insert Input and Output Pipeline registers7-11Distributed Pipelining7-12What is Distributed Pipelin7-12Benefits and Costs of Distributed pipelining7-12Selected Bibliograph7-12Pipeline matlab variables7-13Using the hdl Workflow Advisor7-13Using the Command Line Interface7-13Limitations of MatlAB Variable Pipelining7-13Optimize MatLAb loops7-15oop Streaming7-15Loop unrolling7-15How to Optimize maTLaB loops7-15Limitations for MaTLAB Loop Optimization7-16Constant Multiplier optimization7-17Specify constant multiplier optimization7-19Distributed Pipelining for Clock Speed Optimization7-20Map Matrices to Block RAMs to Reduce Area7-27Resource Sharing of Multipliers to Reduce Area7-32Loop streaming to Reduce Area7-41Contents
- 2020-12-10下载
- 积分：1
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hysplit4后向轨迹操作手册
hysplit是NOAA研发的一款进行气流反演的一款软件，通过气象数据进行分析大气输送通道。
- 2020-12-07下载
- 积分：1
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Labview实现的11款小游戏_有详细过程
Labview实现的11款小游戏_有详细过程 初学者的好帮手
- 2020-12-05下载
- 积分：1
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