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STM32硬件I2C读写AT24Cxx
使用stm32硬件I2C读写AT24一系列的EEPROM，只要修改里面的宏，就可以定义使用的是I2C1,或者I2C2。
- 2020-12-07下载
- 积分：1
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verilog_IEEE官方标准手册-2005_IEEE_P1364
The Verilog® Hardware Description Language (Verilog HDL) became an IEEE standard in 1995 as IEEEStd 1364-1995. It was designed to be simple, intuitive, and effective at multiple levels of abstraction in astandard textual format for a variety of design tools, including verification simulation, timiThe clear directive from the users for these three task forces was to start by solving some of the followingproblemsConsolidate existing IeeE Std 1364-1995Verilog generate statementMulti-dimensional arraysEnhanced Verilog file i/oRe-entrant tasksStandardize Verilog configurationsEnhance timing representationEnhance the vpi routinesAchievementsOver a period of four years the 1364 Verilog Standards Group(vsg) has produced five drafts of the lrmThe three task forces went through the EEe Std 1364-1995 lRM very thoroughly and in the process of consolidating the existing Lrm have been able to provide nearly three hundred clarifications and errata for theBehavioral, ASIC, and PLI sections. In addition, the vsg has also been able to agree on all the enhance-ments that were requested (including the ones stated above)Three new sections have been added. Clause 13, "Configuring the contents of a design, deals with configuration management and has been added to facilitate both the sharing of verilog designs between designersand/or design groups and the repeatability of the exact contents of a given simulation session Clause 15Timing checks, "has been broken out of Clause 17, "System tasks and functions, "and details more fullhow timing checks are used in specify blocks. Clause 16, "Backannotation using the Standard Delay Format(SDF), addresses using back annotation(IEEE Std 1497-1999)within IEEE Std 1364-2001Extreme care has been taken to enhance the vpi routines to handle all the enhancements in the behavioraland other areas of the lrm. minimum work has been done on the pli routines and most of the work hasbeen concentrated on the vpi routines. Some of the enhancements in the vpi are the save and restart simu-lation control, work area access, error handling, assign/deassign and support for array of instances, generateand file 1/0Work on this standard would not have been possible without funding from the cas society of the ieee andOpen verilog InternationalThe IEEE Std 1364-2001 Verilog standards Group organizationMany individuals from many different organizations participated directly or indirectly in the standardizationprocess. The main body of the Ieee Std 1364-2001 working group is located in the United States, with asubgroup in Japan (EIAJ/1364HDL)The members of the IEEE Std 1364-2001 working group had voting privileges and all motions had to beapproved by this group to be implemented the three task forces focused on their specific areas and theirrecommendations were eventually voted on by the Ieee Std 1364-2001 working group
- 2020-12-11下载
- 积分：1
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IWR1642学习文档
IWR1642是一款毫米波雷达，是 TI 毫米波感应产品系列，设置简单，提供开箱即用的快速评估和开发代码。由于该款毫米波雷达刚问世，中文资料极少，本文档是学习该毫米波雷达不可或缺的中文资料。
- 2021-05-06下载
- 积分：1
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matlab与simulink模拟仿真实例教程
本压缩文件提供许多matlab与simulink模拟仿真实例教程，相信对初学者有用。
- 2020-12-04下载
- 积分：1
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串行级联cpm系统MATLAB仿真
串行级联cpm系统MATLAB仿真，毕业设计完整程序
- 2019-09-29下载
- 积分：1
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地图缩编软件domap
地图综合，缩编软件，武汉大学产品，强烈推荐，很不错的哦！
- 2020-11-29下载
- 积分：1
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遗传算法及其应用-陈国良
陈国良版本的遗传算法及其应用，自认为是一本遗传算法入门不错的书，以前看过纸质版的，电子版的不够清晰，分享出来，希望能帮到大家。
- 2020-12-10下载
- 积分：1
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射频与微波功率放大器设计
内容简介 这是本严谨的教程，它可帮助您缩短设计周期并改善器件效率。书中设计工程师Andrei Grebennikov告诉您如何与计算机辅助设计技术结合在一起进行分析计算，在处理与生产的过程中提高效率；使用了近300个详细的图表、曲线、电路图图示说明，提供给您所需要的、改善设计的所有信息。 本书主要阐述设计射频与微波功率放大器所需的理论、方法、设计技巧，以及有效地将分析计算与计算机辅助设计相结合的优化设计方法。它为电子工程师提供了几乎所有可能的方法，以提高设计效率和缩短设计周期。书中不仅注重基于最新技术的新方法，而且涉及许多传统的设计方法，这些技术对现代无线通信系统的微电子核心是至关重
- 2020-12-05下载
- 积分：1
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osgb/ive/osg/obj模型格式互转工具
模型格式转换工具，支持osgb、ive、osg、obj四种格式之间的相互转换
- 2020-11-28下载
- 积分：1
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STM32 USART例程源代码
曾经开发STM32用过的一些基本应用的源代码，希望对学习嵌入式的同学们有所用处
- 2020-12-10下载
- 积分：1
