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LCD_test
this a example for the LCD for altera FPGA cyclone ii EP2C8. implemented in verilog. tested using altera EP2C8 fpga
- 2013-07-25 14:43:43下载
- 积分：1
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Noc
credit base network on chip(network on chip (noc))
- 2020-06-19 11:40:02下载
- 积分：1
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20190718
说明： uart implementation and documentation, this describes the basic steps in building your own uart module on verilog and programming them on an fpga device
- 2020-06-21 21:40:01下载
- 积分：1
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tcd1209+AD994的FPGA驱动代码
按照手册驱动线阵CCDTCD1209和AD9945，驱动频率10M，板卡时钟30MHz，经PLL分频后输入驱动，该程序在altera cyclone IVE上验证通过
- 2022-02-10 07:25:35下载
- 积分：1
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422
串口收发，实现可调波特率的串口通信，verilog源码(Serial port and transceiver)
- 2021-04-07 15:19:01下载
- 积分：1
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myAdc9248
CycloneIV控制采样芯片AD9248-20MHz，VHDL语言(CycloneIV control sampling chip AD9248-20MHz, VHDL language)
- 2017-01-31 21:55:26下载
- 积分：1
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呼吸灯verilog
- 2022-02-06 03:39:41下载
- 积分：1
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PERI4-DM9000A
基于FPGA的DM9000A芯片的网络数据采集系统，基于NIOS架构，c语言编程，资料齐全，包含不止5个源程序，绝对受用！(FPGA-based the DM9000A chip network data acquisition system based on NIOS architecture, c programming language, the information is complete, contains more than 5 source code is absolutely good enough!)
- 2020-09-16 16:57:55下载
- 积分：1
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一种新型设计的可逆 2:4 译码器
可逆的逻辑已收到
- 2023-03-10 23:00:04下载
- 积分：1
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sync-and-asyn_FIFO_verilog
同步与异步FIFO的verilog实现，包括源代码，testbench，测试以及综合通过，还有相关参考资料(Synchronous and asynchronous FIFO verilog achieve, including source code, testbench, test and integrated through, as well as related references)
- 2021-03-07 14:19:29下载
- 积分：1
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