登录
首页 » VHDL » 本文是自已写的电子密码锁的详细开发过程,用的是Modelsim进行仿真实现,打开文档lzp...

本文是自已写的电子密码锁的详细开发过程,用的是Modelsim进行仿真实现,打开文档lzp...

于 2022-01-25 发布 文件大小:717.22 kB
0 142
下载积分: 2 下载次数: 1

代码说明:

本文是自已写的电子密码锁的详细开发过程,用的是Modelsim进行仿真实现,打开文档lzp-This article is written in their own electronic locks detailed development process, using a ModelSim simulation achieved, open the document lzp

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • 看了好多网了,发现有2to4译码,3to8译码,今天我要用4to16译码,写完了就发了上来...
    看了好多网了,发现有2to4译码,3to8译码,今天我要用4to16译码,写完了就发了上来-saw a lot of net and found 2to4 decoding, 3to8 decoding, today, I must 4to16 decoding, finished on the fat in the ranks
    2022-03-09 18:15:27下载
    积分:1
  • suoxianghuan
    常用的锁相环技术,此程序是我在设计高频电路中运用的,具体见程序,经调试无问题(Commonly used phase-locked loop technology, this program is in the design I used in high-frequency circuits, see the specific procedures, no problem by debugging)
    2008-08-19 12:02:31下载
    积分:1
  • uart串口的vhdl语言程序。本人调试过 ,非常好用
    uart串口的vhdl语言程序。本人调试过 ,非常好用-serial UART VHDL Language Program. I debug, and very easy to use
    2022-01-22 15:13:57下载
    积分:1
  • FPGA
    基于可编程逻辑器件FPGA的独立式键盘设计,内部具有硬件去抖动电路。值得一看-FPGA-based programmable logic device stand-alone keyboard design, the internal hardware to jitter circuit. Worth a visit
    2022-05-31 21:35:40下载
    积分:1
  • 这是我自己写的两个8位二进制数的乘法程序,在xilinx Spartan3E 上已经调试成功,拿出来与大家分享!...
    这是我自己写的两个8位二进制数的乘法程序,在xilinx Spartan3E 上已经调试成功,拿出来与大家分享!-that I wrote two eight binary number multiplication procedure, In xilinx Spartan3E debugging has been successful, with the show to share with you!
    2022-08-11 07:35:25下载
    积分:1
  • buffer for in/out data.
    buffer for in/out data.
    2023-02-22 20:05:04下载
    积分:1
  • 3M
    说明:  在FPGA实验操作系统实现ASK,FSK,PSK的调制解调,基带信号由M序列发生器产生,经过AD模块在示波器上进行显示,精油DA模块在同一块实验板上进行解调操作,生成信号控制LED灯的亮灭,并与调制输出信号在示波器上同时展示,并进行对比。基带信号为3MHz。(In the FPGA operating system experiment implementation ASK, FSK, PSK modulation and demodulation of the baseband signal generated by the M sequence generator, through the AD module on the oscilloscope display module, oil DA demodulation operation in the same block experiment board, the signal generation control LED lights off, and the modulated output signal displayed on the oscilloscope at the same time, and compared.)
    2018-02-09 20:07:01下载
    积分:1
  • digital-processing-with-FPGA
    vhdl语言,国外教材,数字信号处理算法(vhdl language, foreign materials, digital signal processing algorithms)
    2016-07-22 21:53:49下载
    积分:1
  • verilog编写的计算百分比模块
    verilog编写的计算百分比模块-Verilog prepared by calculating the percentage module
    2022-01-31 18:38:18下载
    积分:1
  • 四分频的程序,输出clkout0就是二分频,clkout1是四分频
    四分频的程序,输出clkout0就是二分频,clkout1是四分频-Quarter-frequency process, the output clkout0 is two-way, clkout1-fourth the frequency
    2022-02-15 17:30:06下载
    积分:1
  • 696516资源总数
  • 106783会员总数
  • 25今日下载