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vga_demo2
VGA controller : Genarate a VGA signal from your inout information as color info of each pixel
- 2010-06-24 09:26:57下载
- 积分：1
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FPGA-Labview
Design FPGA in Labview
- 2015-05-27 23:39:27下载
- 积分：1
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BoneMicoren
Bone microphnoe simulator.
this is a trial to de-noise the bone microphone signals.
This also utilizes om-lsa algorithm
- 2012-12-12 04:47:28下载
- 积分：1
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FPGA源代码
FPGA部分源代码，关于dsp48的应用，从一本很好的书上下的
- 2023-06-23 15:05:04下载
- 积分：1
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M4A564/32 CPLD VHDLＡ程序，调试可用,51扩展.
M4A564/32 CPLD VHDLＡ程序，调试可用,51扩展.-M4A564/32 CPLD VHDLA procedures, debugging is available, 51 to expand.
- 2023-08-25 16:25:03下载
- 积分：1
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本源码为Nios II的开发示例,主要演示Nios II的I2C总线设计。开发环境QuartusII。
本示例十分经典，对基于SOPC开发的FPGA初学者有...
本源码为Nios II的开发示例,主要演示Nios II的I2C总线设计。开发环境QuartusII。
本示例十分经典，对基于SOPC开发的FPGA初学者有很大帮助。-The source code for the Nios II development of an example, the main demonstration Nios II I2C-bus design. Development environment QuartusII. This example is very classic, FPGA-based SOPC development of great help for beginners.
- 2022-05-20 17:06:23下载
- 积分：1
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Walsh
沃尔什函数序列sequency的verilog编程实现，含有测试文件(the Walsh sequence in sequency order)
- 2020-07-03 08:20:01下载
- 积分：1
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generateCAcode
gps C/A码生成
生成gps32颗卫星伪码，方便，经过测试(gps C/A code generation to generate pseudo-code satellites gps32, convenient and tested)
- 2021-05-13 04:30:02下载
- 积分：1
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Pipeline-2
Pipeline processor verilog components
- 2012-12-21 17:53:18下载
- 积分：1
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1路视频光端机的接收端，VHDL源码，使用全FPGA芯片的硬件，内建解帧、时钟、DESERDES...
1路视频光端机的接收端，VHDL源码，使用全FPGA芯片的硬件，内建解帧、时钟、DESERDES-PDH a video of the receiving end, VHDL source code, use the whole FPGA chip hardware, built-in framing, clock, SERDES
- 2022-04-30 11:01:06下载
- 积分：1
