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rs(31-19)
本源代码是RS（31,19）编码器的顶端实现程序和测试程序，此程序可以验证编码器工作与否。此代码，已在ModelSim验证通过。并附上测试时所产生的结果图像。(Source code is RS (31,19) encoder to achieve the top programs and testing procedures, this program can verify the encoder to work or not. This code has been verified in ModelSim. Together with the result when the test images.)
- 2011-05-25 20:59:37下载
- 积分：1
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应用VHDL语言将高稳晶振分频得到1pps，使用GPS的1pps信号作为触发...
应用VHDL语言将高稳晶振分频得到1pps，使用GPS的1pps信号作为触发-Application of VHDL language high stability crystal oscillator frequency to be 1pps, the use of GPS signals as a trigger of 1pps
- 2022-05-12 21:39:28下载
- 积分：1
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PIC单片机学习软件及其资料
PIC单片机学习软件及其资料，入门到精通(PIC MCU learning software and its information, entry to proficiency)
- 2019-07-04 17:17:40下载
- 积分：1
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lvds_ctr_top
说明： 用verilog编写的LVDS接口驱动程序，采用IOSERDES技术实现，经过Spartan6 FPGA调试验证，有完整的工程。(The LVDS interface driver written in verilog is implemented using IOSERDES technology. After Spartan6 FPGA debugging and verification, there is a complete project.)
- 2020-03-16 10:29:10下载
- 积分：1
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vhdl,双向移位寄存器，实现置数，左移及右移操作
vhdl,双向移位寄存器，实现置数，左移及右移操作-vhdl, bi-directional shift register to achieve set the number of left and right shift operation
- 2022-07-14 16:53:32下载
- 积分：1
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NIOS设计从入门到精通
nios大神进阶，一本非常好的FPGA书籍，从RTL到eclips(nios tech.a very good book learning FPGA tech.)
- 2018-06-04 11:39:01下载
- 积分：1
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一个在Xilinx spartan3实现的时钟，具有时分秒的计时显示以及年月日的显示，很有参考价值
一个在Xilinx spartan3实现的时钟，具有时分秒的计时显示以及年月日的显示，很有参考价值-A Xilinx spartan3 realize the clock, with time-accurate time display and date display, a good reference
- 2022-08-12 21:17:53下载
- 积分：1
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binary_adder_subtractor
binary adder / subtracter in vhdl
- 2012-12-10 14:54:57下载
- 积分：1
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CAM
Content-addressable memory (CAM) is a special type of computer memory used in certain very-high-speed searching applications. It is also known as associative memory, associative storage, or associative array, although the last term is more often used for a programming data structure.
- 2014-12-06 00:33:45下载
- 积分：1
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印制线路板设计经验点滴
印制线路板设计经验点滴-Printed Circuit Board Design Experience
- 2022-04-09 19:37:37下载
- 积分：1
