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asynchronous serial communication port of the FPGA, function (1) serial data rec...
异步串口通信口在FPGA实现,功能有(1)串行数据接收的同步控制;(2) 串行数据发送的同步控制-asynchronous serial communication port of the FPGA, function (1) serial data receiver synchronization control; (2) the transmission of serial data synchronization control
- 2023-06-21 16:25:03下载
- 积分:1
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次源码实现一个扩频接收机系统,用VHDL语言编写,并且有完整得测试程序
次源码实现一个扩频接收机系统,用VHDL语言编写,并且有完整得测试程序-Second source to achieve a spread spectrum receiver system, using VHDL language, and have a complete test procedure was
- 2023-03-07 13:30:03下载
- 积分:1
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基于VHDL的UART控制器设计
UART模块的VHDL语言设计(Design of VHDL language based on UART module)
- 2017-11-13 23:56:26下载
- 积分:1
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CCPRRIzipP
一种基于CPRI标准的WCDMA NoddeB射频光纤拉远接口FPGA设计.pdf
(CPRI compliant the WCDMA NoddeB RF fiber pull far from the interface of the FPGA design. Pdf)
- 2012-07-19 22:29:39下载
- 积分:1
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hapf
单相混合有源电力滤波器的设计与控制,在matlab中的仿真模型,功能效果很好。(The design and control of single-phase hybrid active power filter in matlab simulation model, the function works well.)
- 2012-12-11 16:17:23下载
- 积分:1
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Walsh
说明: 利用ISE编写的产生WALSH码的verilog程序,简单易懂,稍稍修改就可以产生出自己想的8 16 32 64位的WALSH码。。(Prepared using ISE verilog code generated WALSH procedures, easy to understand, a little modification can generate their own like the 8,16,32,64-bit code WALSH. .)
- 2010-04-20 09:55:10下载
- 积分:1
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VHDL2FSK
VHDL 2FSK调制解调器各部分的原理与代码(The principle and code of each part of the VHDL 2FSK modem)
- 2021-05-12 17:30:03下载
- 积分:1
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uart16550 ip core UART VHDL source code
uart16550 ip core 通用异步收发器vhdl源代码-uart16550 ip core UART VHDL source code
- 2022-07-11 01:23:07下载
- 积分:1
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ADC-Parameter
外部ADC采集数据,存为数组文件。通过程序读入,然后即可求出ADC的SNR、SINAD、THD、ENOB等。(External ADC data collection, stored as an array of documents. Read through the program, then the ADC SNR, SINAD, THD, ENOB can be calculated.)
- 2021-03-15 21:39:22下载
- 积分:1
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rams
说明: combinatorial modules
- 2019-04-13 19:41:21下载
- 积分:1