-
SPI
design and implement a digital system on the Altera NIOS board which will read an analogue input using MicroChip’s SPI MCP3202 12-Bit A/D converter. The 8 most significant bits of the converted data will be displayed on two seven segments of the NIOS development board. The sampling frequency is 20kHZ. Use a potentiometer.(design and implement a digital system on the Altera NIOS board which will read an analogue input using MicroChip' s SPI MCP3202 12-Bit A/D converter. The 8 most significant bits of the converted data will be displayed on two seven segments of the NIOS development board . The sampling frequency is 20kHZ. Use a potentiometer.)
- 2010-08-17 19:16:12下载
- 积分：1
-
试验台的 cavlc entrope 解码器
描述
- 2022-01-23 10:08:11下载
- 积分：1
-
BISS-c协议中英文版本
描述了IC-hus公司推出的BISS-C协议内容，包括单向biss-c协议以及标准biss-c协议(Describes the BISS-C protocol introduced by IC-hus, including the one-way biss-c protocol and the standard biss-c protocol)
- 2021-05-10 10:18:53下载
- 积分：1
-
fpga0023202323
FPGA时序分析说明。对于高速时钟设计中的时序分析与约束有帮助(FPGA,TIME)
- 2010-11-01 15:49:34下载
- 积分：1
-
sigmod
FPGA实现基于cordic算法的指数函数的程序(FPGA implementation of an exponential function program based on the cordic algorithm)
- 2020-09-10 16:28:00下载
- 积分：1
-
基于FPGA的AD_DA驱动
本资料是基于FPGA的AD_DA数据采集系统。所用AD是ADC081S，DA是DAC5311。通过查阅相关的AD_DA时序图，得出驱动程序。这对要写时序的初学者有很大的帮助。
- 2022-05-28 00:40:37下载
- 积分：1
-
4-to-1
4选1数据选择器，有使能端控制，4个数据输入，2个地址端，1个输出(4 1 data selector, enable end control, four data inputs, two addresses end, an output)
- 2012-10-15 18:48:38下载
- 积分：1
-
axi_master
DDR3 控制器，axi4_full 模式， burst长度为16，应用于xilinx平台。(DDR3 interface controller， axi4_full working mode with burst length 16, can operate on the xilinx platform.)
- 2017-05-16 11:26:28下载
- 积分：1
-
SMBus
SMbus通讯协议的Verilog程序段，已通过Moldesim的仿真，可用(Verilog program segment of the SMbus communication protocol, has been through the Moldesim simulation, the available)
- 2021-03-24 18:29:15下载
- 积分：1
-
xapp224_data_recovery_design-file
XAPP224 VHDL Data Recovery design file
- 2021-03-30 17:49:09下载
- 积分：1
