登录
首页 » Verilog » SATA数据传输控制程序

SATA数据传输控制程序

于 2022-01-25 发布 文件大小:378.04 kB
0 108
下载积分: 2 下载次数: 2

代码说明:

SATA接口控制程序,在FPGA中实现,包含了底层协议,可以简便的实现了SATA接口固态硬盘(SSD)的读写。

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • SDC_RDC
    基于FPGA的双通道旋转变压器测角系统硬件设计,分析的比较清楚。(FPGA based dual channel rotary transformer angle measurement system hardware design, analysis of the relatively clear.)
    2011-08-07 20:23:10下载
    积分:1
  • DecimationFilterDesignforDDCandImplementingItwithF
    本文介绍了在数字下变频(DDC) 中的抽取滤波器系统设计方法和具体实现方案。采用CIC 滤波器、HB 滤波器、FIR 滤波器三级级联的方式来降低采样率。通过实际验证,证明了设计的可行性(This article describes the digital down conversion (DDC) of the decimation filter system design methods and concrete realization of the program. Using CIC filter, HB filter, FIR filter cascade three-level approach to reduce the sampling rate. Through the actual authentication, to prove the feasibility of the design)
    2008-04-14 11:02:00下载
    积分:1
  • hilbert
    用VHDL实现了希尔伯特滤波器,即就是幅度不变,而相位移动90度(use vhdl to accomplish the hilbert filter)
    2020-12-29 18:09:02下载
    积分:1
  • DDS波形发生器
    DDS波形生成器verilog语言书写(FPGA型号cy4以上)(DDS generate verilog)
    2017-07-17 22:25:11下载
    积分:1
  • ddr3_test
    说明:  通过循环读写DDR3内存,了解其工作原理和DDR3控制器的写法,由于DDR3控制复杂,控制器的编写难度高,这里笔者介绍XILINX的MIG控制器情况下应用,是后续音频、视频等需要用到SDRAM实验的基础。(Through reading and writing DDR3 memory circularly, we can understand its working principle and the writing method of DDR3 controller. Because of the complexity of DDR3 control, it is difficult to write the controller. Here, the author introduces the application of Xilinx's MIG controller, which is the basis of SDRAM experiment for subsequent audio and video.)
    2021-04-16 10:00:15下载
    积分:1
  • SeggerEval_LPC2478
    emWin 在LPC2478上实现LCD的高性能显示(emWin to achieve high-performance LCD display in the LPC2478)
    2012-08-04 13:54:29下载
    积分:1
  • fpga
    FPGA代码,包含地址译码模块、16位锁存器、AD片选、死区及滤除窄脉冲、过流和短路保护、解除脉冲封锁模块、PWM模块、PWM选择 (FPGA code, including the address decoder module 16 latches, AD chip select, filter out the dead and narrow pulse, overcurrent and short circuit protection, lifting the blockade pulse module, PWM module, PWM selection)
    2015-11-18 10:47:22下载
    积分:1
  • mike11xns
    mike11河道断面处理软件,将断面格式写成11要求的格式(MIKE11 river section processing software, the section format 11 format )
    2021-04-06 17:29:02下载
    积分:1
  • state-machine
    一个简单的用verilog实现的售货机状态机设计,内有word介绍设计的原理(A simple realization of a vending machine with verilog state machine design, there are design principles introduced word)
    2021-01-20 23:48:42下载
    积分:1
  • Verilog-communication-source-code
    基于Verilog的串口通信源码 ,实现串口通信功能(Verilog source code based on serial communication)
    2011-10-29 17:21:59下载
    积分:1
  • 696518资源总数
  • 106208会员总数
  • 21今日下载