-
I2C slave设计代码
I2C slave功能模块的一种实现方式,简单易根据自己实际需求做修改,已经过FPGA验证可以很好的工作
- 2022-03-20 06:59:34下载
- 积分:1
-
LFM
说明: 该程序使用Verilog语言产生LFM信号(The program uses Verilog language to generate LFM signals.)
- 2021-04-19 09:38:51下载
- 积分:1
-
VHDL_freerisc8
说明: 一个8位RiSC单片机的VHDL代码,
具有很好的参考价值。(an eight RiSC SCM VHDL code, is a good reference value.)
- 2006-02-15 10:58:14下载
- 积分:1
-
chengxu
设计制作一个可容纳4组参赛者的数字智力抢答器,每组设置一个抢答按键;
电路具有一第一抢答信号的鉴别和锁存的功能。在主持人将系统复位并发出抢答指令后,若参加者按抢答键,则该组指示灯亮并用组别显示抢答者的组别。此时,电路具有自锁功能,使别组的抢答开关不起作用。
设置计分电路。每组在开始时预置成6分,抢答后主持人计分,答对一次加1分。(The design can accommodate a the Entrants digital intellectual Responder, each set answer in a key circuit has a first answer in the signal to identify and latch functions. Host to the system reset and sent the answer in instruction, participants answer in key, the group of the group light and display the answer in the group. At this point, the circuit has a self-locking function does not work in other groups to answer switch. Set Scoring circuit. Preset six points each at the beginning of the answer in scoring after the host, answer time, add 1 point.)
- 2012-06-10 12:58:44下载
- 积分:1
-
verlog通过FPGA实现数字钟
verlog通过FPGA实现数字钟,包含时间计数,秒表和闹钟等功能
- 2022-03-14 07:30:03下载
- 积分:1
-
8位数字显示的简易频率计
(1)能够测试10HZ~10MHZ的方波信号;
(2)电路输入的基准时钟为1HZ,要求测量值以8421BCD码形式输出;
(3)系统有复位键;
(4)采用分层次分模块的方法,用Verilog HDL进行设计,并对各个模块写出测试代码;
(5)具体参照说明文档(包含源代码,仿真图,测试波形,详细的设计说明)(A square wave signal capable of testing 10HZ~10MHZ;
(2) the reference clock input by the circuit is 1HZ, and the measured value is output in the form of 8421BCD code;
(3) the system has a reset key;
(4) adopt the method of layering sub sub module and design with Verilog HDL;
(5) write test simulation program.)
- 2020-12-02 02:59:26下载
- 积分:1
-
dual-mode,turbo译码器
应用背景Turbo码是性能接近Shannon极限的纠错码,广泛应用于现代通信系统中,未来通信技术的发展迫切需要支持双模或多模编译码器。Log-MAP算法作为LDPC码和Turbo码的译码算法,并将Turbo码的简化算法查表法应用于LDPC码。关键技术Turbo码采用递归系统卷积码作为级联的分量码,在迭代译码过程中,分量码译码器之间相互交换软信息来提高Turbo码的译码性能,其译码算法主要包括最大后验概率算法(Maximum A Posterior Possibility,MAP)及其简化算法和软输出Viterbi算法(Soft Output Viterbi Algorithm,SOVA)。
- 2023-06-15 06:50:03下载
- 积分:1
-
Verilog的150个经典设计实例
Verilog经典实例.包括洗衣机红路灯、兹自动方麦基、等式子可用(Classic examples of Verilog. Including red street lights for washing machines, ZAM, equation availability)
- 2021-03-17 16:49:20下载
- 积分:1
-
single_phase_inverter_wangyafankui
带有电网电压反馈的单相PWM整流器反馈,输出的波形很好,适合初学者学习观摩(With power grid voltage feedback single-phase PWM rectifier feedback, the output waveform is very good, suitable for beginners learning view
)
- 2012-11-30 16:16:04下载
- 积分:1
-
Blazing-Fiber-grating
闪耀光栅
有带阻滤波器作用的闪耀光纤光栅,反射角度可以控制(Blazed grating)
- 2021-03-27 09:19:12下载
- 积分:1