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PCB库存封装缩写说明: PCB库存封装缩写说明
PCB库存封装缩写说明: PCB库存封装缩写说明 -PCB inventory package abbreviation Description: PCB inventory package abbreviation Description
- 2022-02-12 19:00:25下载
- 积分：1
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中国移动的彩信业务规范，对于才发基于彩信的业务平台和应用软件很有帮助...
中国移动的彩信业务规范，对于才发基于彩信的业务平台和应用软件很有帮助-China Mobile MMS business standards for the only fat based on the MMS platform and the business application software helpful
- 2022-05-20 13:50:29下载
- 积分：1
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不错的svm讲义，对于svm的背景和原理有比较详细的讲解
不错的svm讲义，对于svm的背景和原理有比较详细的讲解-svm
- 2022-03-24 05:42:29下载
- 积分：1
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自己看把，地方了；费； DL；KFF F FFG
自己看把，地方了；费； DL；KFF F FFG-can put their own local; Fees; DL; KFF F FFG
- 2022-01-27 11:29:57下载
- 积分：1
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MC52233 based data acquisition schematic
MC52233 based data acquisition schematic
- 2022-09-21 18:40:03下载
- 积分：1
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RFC3455中文版，对于学习IMS的人有很大的帮助。
RFC3455中文版，对于学习IMS的人有很大的帮助。-RFC3455 Chinese version of the IMS learning there is a great help.
- 2023-01-17 23:35:03下载
- 积分：1
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对数字化变电站的应用做出了实现远景,可参考阅读
对数字化变电站的应用做出了实现远景,可参考阅读-Substation on the application of digital has made the realization of the vision, we can make reference to read
- 2022-07-20 13:11:20下载
- 积分：1
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foreign authority on wireless sensor networks on the professional field
国外权威的关于无线传感器网络专业领域的综述-foreign authority on wireless sensor networks on the professional field
- 2023-03-05 07:10:05下载
- 积分：1
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现代先进微处理器有非常高的集成度和复杂度，又有寄存器堆、Cache等嵌入式部件，而且芯片管脚数相对较少，必须要有一定的自测试设计和其它的可测试性设计来简化测试代...
现代先进微处理器有非常高的集成度和复杂度，又有寄存器堆、Cache等嵌入式部件，而且芯片管脚数相对较少，必须要有一定的自测试设计和其它的可测试性设计来简化测试代码，提高故障覆盖率。本文简要讨论NRS4000微处理器芯片的以边界扫描测试为主体，以自测试为补充的可测试性设计框架。着重介绍芯片的边界扫描设计和芯片中译码控制器PLA和微程序ＲＯＭ以及采用内嵌RAM结构的指令Cache和寄存器堆的内建自测试设计。仿真结果表明，这些可测试性设计大大缩短了测试代码的长度。-modern microprocessors have a very high degree of integration and complexity, there Register pile, Cache such as embedded components, but Chip few relatively small, There must be the self-test design and testing of other design code to simplify testing, fault coverage. This paper briefly discussed Key words microprocessor chip to the boundary-scan test as the mainstay, Since the test to add to the test design framework. Highlighting the boundary-scan chip design and chip decoder PLA and micro-controller procedures and the use of embedded ROM RA M structure of the instruction cache and register stack of built-in self-test design. The simulation results show that these tests can greatly shorten the design of the test code length.
- 2022-04-01 18:08:40下载
- 积分：1
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Development of DVB
Development of DVB-T RF Tuners (cn)
- 2022-03-06 05:06:26下载
- 积分：1
