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GUI
1）选择一个语音信号作为分析对象，或录制一段语音信号； 2）对语音信号进行采样，画出采样前后语音信号的时域波形和频谱图； 3）利用MATLAB中的随机函数产生噪声加入到语音信号中，使语音信号被污染，然后进行频谱分析； 4）设计用于处理该语音信号的数字滤波器，给出滤波器的性能指标，画出滤波器的频率响应； 5）对被噪声污染的语音信号进行滤波，画出滤波前后信号的时域波形和频谱，并对滤波前后的信号进行比较和分析； 6）回放各步骤的语音信号，给出相应处理程序及运行结果分析。(1) Select a voice signal as an analysis object, or record a voice signal 2) sampling the voice signal, draw the waveform and frequency spectrum of the time domain before and after sampling the speech signal 3) using the random function in MATLAB generated noise was added to the speech signal, the speech signal to be contaminated, and then spectrum analysis 4) for processing the speech signal, the digital filter design, given the performance of the filter to draw the filter' s frequency response 5) on the noise pollution of the speech signal is filtered, time-domain waveform and spectrum draw before and after filtering the signal before and after filtering, and the signal for comparison and analysis 6) playback of the speech signal for each step, given the results of the corresponding processing procedures and run analysis.)
- 2021-03-18 17:29:19下载
- 积分：1
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PA3_E_FROM_AN
actel flash rom使用 actel flash rom使用(actel flash rom actel flash rom)
- 2013-05-07 14:42:44下载
- 积分：1
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UART
说明： 使用FPGA的FIFO，状态机，乒乓操作等实现了异步UART。(The use of FPGA-FIFO, state machine, ping-pong operation to achieve the asynchronous UART.)
- 2008-10-09 15:59:20下载
- 积分：1
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ADC_Data_Recv_Module
接收机测试输入信号，
生成正余弦波，采样率、频率、幅度、相位可调节
并将生成的数据进行输出
压缩包包括Verilog代码、testbench代码、word文档
matlab仿真代码(The receiver tests the input signal,
Generation of positive cosine wave, sampling rate, frequency, amplitude, phase can be adjusted
And output the generated data
The compressed package includes the Verilog code, the testbench code
Matlab simulation code)
- 2017-12-08 17:56:02下载
- 积分：1
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clk
sin波形发生图形，应用智能老师款到即发了快速打击 (sin waveform generation graphics application smart teacher paragraph to that made a rapid strike)
- 2013-02-24 15:46:58下载
- 积分：1
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FPGA MAC控制器
FPGA MAC控制器 可以用FPGA实现MAC控制器功能，FPGA MAC控制器 可以用FPGA实现MAC控制器功能，FPGA MAC控制器 可以用FPGA实现MAC控制器功能
- 2022-03-26 11:58:59下载
- 积分：1
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uart
UART串口的verilog源代码，完全正确...........(UART serial Verilog source code, completely correct ...........)
- 2009-03-02 14:44:16下载
- 积分：1
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PN-(2)
伪随机序列FPGA 通过仿真 M3000(Pseudo-random sequence M3000 FPGA simulation)
- 2011-06-09 13:40:00下载
- 积分：1
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alu2
verilog alu 8bit for engineers
- 2011-05-26 11:32:21下载
- 积分：1
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CPU流水线设计报告
说明： CPU课程设计要求以FPGA开发平台为例，分析 CPU 设计的流程与仿真。
本次开发使用的硬件描述语言是 Verilog 语言，使用的指令系统是一个以 MIPS 指令集为子集的指令系统，共 22 条指令，所用的设计仿真软件Modelsim。(CPU curriculum design requires FPGA development platform as an example to analyze the process and Simulation of CPU design.
The hardware description language used in this development is Verilog language, and the instruction system used is an instruction system with MIPS instruction set as a subset, with 22 instructions in total. The design simulation software Modelsim is used.)
- 2020-12-24 12:09:05下载
- 积分：1
