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shuzizhongsheji
有用的数字钟设计文档，有秒表、闹钟等模块，希望对大家有用！(JUST LEARN FROM IT!!ENJOY!)
- 2013-07-18 11:02:24下载
- 积分：1
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LabView
说明： 阿尔泰PCI8664的采集卡labview程序(PCI8664，labview，programm)
- 2021-04-14 16:48:55下载
- 积分：1
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pprobar
ES A PRACRICA 2 DEL LABORATORIO DE DIGITAL
- 2013-12-09 04:26:42下载
- 积分：1
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FPGA-root-operation
本文分析比较了实现开方运算的牛顿一莱福森算法、逐次逼近算法、非冗余开方算法种算法,并给出了基于的开方器的实现方法(Root operation FPGA-based implementation.pdf)
- 2012-11-04 01:44:02下载
- 积分：1
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用于FPGA的反Z变换算法的Verilog代码。可用于JPEG及MPEG压缩算法。...
用于FPGA的反Z变换算法的Verilog代码。可用于JPEG及MPEG压缩算法。-FPGA for the anti-Z transform algorithm of Verilog code. Can be used in JPEG and MPEG compression algorithms.
- 2022-02-25 16:18:57下载
- 积分：1
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biss
绝对位置编码器biss与FPGA之间的通信(Absolute position encoder biss communication with FPGA)
- 2017-08-04 12:10:13下载
- 积分：1
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this project is based on 8*3 encoder and 3*8 decoder using vhdl.this is the 100...
this project is based on 8*3 encoder and 3*8 decoder using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering.
Here dataflow techniques and behavioural
-this project is based on 8*3 encoder and 3*8 decoder using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering.
Here dataflow techniques and behavioural
- 2022-07-15 18:56:36下载
- 积分：1
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mod 6 计数器
在几乎所有的数字系统，计数器被广泛使用的领域，如频率
- 2022-06-14 15:14:34下载
- 积分：1
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16 point radix 2
使用 c languageit 的 16 点基 2 fft 代码将 16 点时间域序列转换为频率域
- 2022-10-05 23:25:03下载
- 积分：1
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vhdl的一个串行序列信号发生器的设计与实现
vhdl的一个串行序列信号发生器的设计与实现-vhdl sequence of a Serial Signal Generator Design and Implementation
- 2022-04-24 02:34:50下载
- 积分：1
