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myAdc9248
CycloneIV控制采样芯片AD9248-20MHz，VHDL语言(CycloneIV control sampling chip AD9248-20MHz, VHDL language)
- 2017-01-31 21:55:26下载
- 积分：1
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Several common multiplier Verilog, VHDL code
几种常用乘法器的Verilog、VHDL代码-Several common multiplier Verilog, VHDL code
- 2022-03-12 09:47:07下载
- 积分：1
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Verilog实现的VGA程序，用ISE打开工程文件即可
Verilog实现的VGA程序，用ISE打开工程文件即可-Verilog implementation VGA program, open the project file with the ISE can be
- 2022-03-11 09:21:27下载
- 积分：1
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1．初始状态为4个方向的红灯全亮，时间1秒。
2．东、西方向绿灯亮，南、北方向红灯亮。东、西方向通车，时间30秒。
3．东、西方向黄灯闪烁，南、北方...
1．初始状态为4个方向的红灯全亮，时间1秒。
2．东、西方向绿灯亮，南、北方向红灯亮。东、西方向通车，时间30秒。
3．东、西方向黄灯闪烁，南、北方向红灯亮。时间2秒。
4．东、西方向红灯亮，南、北方向绿灯亮。南、北方向通车，时间15秒。
5．东、西方向红灯亮，南、北方向黄灯闪烁。时间2秒。
6．返回2，继续运行。
-1. Initial state for four whole direction of the red lights lit up, a second time. 2. East and West to the green, in the south, north to the red light. West and the East to open in time for 30 seconds. 3. East and West to the blinking yellow light, in the south, north to the red light. Time 2 seconds. 4. East and West to the red light, in the south, north to the green. South and North to the opening time of 15 seconds. 5. East and West to the red light, in the south, north to the flashing yellow light. Time 2 seconds. 6. Return 2, continued to operate.
- 2023-01-12 03:20:04下载
- 积分：1
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lab7_files
关于Digilent Atlys Spartan-6 FPGA development board audio ac97的讲解及具体应用的源码(Digilent Atlys Spartan-6 FPGA development board audio of ac97' s presentation as well as the specific application' s source code)
- 2013-02-01 11:02:38下载
- 积分：1
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8.4-ADC0809-VHDL-control-program
基于VHDL语言，实现对ADC0809简单控制(Based on VHDL language, to achieve the ADC0809 simple control)
- 2011-11-29 08:43:07下载
- 积分：1
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frame_syn
通信系统中数据的传输以帧为单位，在FPGA中帧头检测是通信系统中的一部分，该程序实现了FPGA中帧头的检测。(Transmission of data in a communication system in units of frames, the frame header is detected in the FPGA part of the communication system, the realization of the frame header is detected in the FPGA.)
- 2014-08-27 16:02:54下载
- 积分：1
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cloc
时钟在单片机中的应用，用于控制中断及显示程序(Clock in the MCU application, used to control interrupt and display program)
- 2013-06-04 15:27:35下载
- 积分：1
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4
Verilog的135个经典设计实例.使你工作使用学习中，会有很大帮助，各种典型案例(135 classic Verilog design examples. Make your work with the study, will be of great help, of various typical cases
)
- 2014-03-19 10:55:14下载
- 积分：1
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VHDL
EDA技术以EDA软件工具为开发环境，以可编程逻辑器件为实验载体，实现源代码编程和仿真功能。VHDL作为一种标准化的硬件描述语言用于描述数字系统的结构、行为、功能和接口。本设计提出了一种基于VHDL语言的编码器和译码器的实现方法。编码器与译码器是计算机电路中基本的器件，本课程设计采用EDA技术设计编码和译码器。编码器由8线-3线优先编码器作为实例代表，译码器则包含3线-8线译码器和2线-4线译码器两个实例模块组成。课程设计采用硬件描述语言VHDL把电路按模块化方式进行设计，然后进行编程、时序仿真和分析等。课程设计结构简单，使用方便，具有一定的应用价值。
(EDA technology take the EDA software as tools for the development of the environment,programmable logic devices in experimental carrier,the realiztion of the source code programming and simulation. The VHDL as a standardized hardware description language used to describe the struction of digital systems,behavior,function and interface. The paper proposes a method for encoder and decoder based on the VHDL language.Encoder and decoder is a basic computer circuit devices.This Curriculum design by EDA design encoder and decoder.Encoders from 8- 3 priority encoder for example,and decoder includes 3- 8 decoder and the 2- 4 examples of the two decoder modules.And then to program, the timing simulation and analysis.Curriculum design, simple structure, easy to use and has a value.)
- 2011-06-22 21:23:30下载
- 积分：1
