-
移位相加硬件乘法器,基于FPGA的VHDL语言编写的,含有全部文件
移位相加硬件乘法器,基于FPGA的VHDL语言编写的,含有全部文件-displacement add hardware multiplier, based on FPGA VHDL prepared, containing all the documents
- 2022-06-19 21:07:11下载
- 积分：1
-
Add_sub_struc
8位加减器，八位减法器与加法器，用过一个控制端可以自由变换，采用移位加法方式，用途广泛，利用减法位补码加法的理论实现。(8 addition and subtraction, eight subtractor and adder, used a control terminal can freely change the using Shift addition, a wide range of uses, the use of subtraction complement addition theory to achieve.)
- 2012-05-14 20:36:26下载
- 积分：1
-
Microcomputer-Principle
该书介绍了英特尔的80x86CPU和一些串行通信芯片，以及汇编语言。(The book introduces the Intel 80x86CPU and some serial communications chip, and assembly language.)
- 2013-07-27 14:55:25下载
- 积分：1
-
irdecode
自己编写的红外解码子程序，但CPU资源占用较高，作教学示范用途。(prepared their infrared decoding routines, but higher occupancy CPU resources for teaching demonstration purposes.)
- 2006-11-05 13:51:28下载
- 积分：1
-
Synopsys 8051 IP core documentation.
Synopsys 8051 IP core documentation.
- 2022-06-26 21:44:13下载
- 积分：1
-
digital_clock
数字钟通过verilog实现，并且支持Modelsim仿真，通过实验验证(The digital clock is implemented by Verilog and supports Modelsim simulation)
- 2020-06-18 05:00:02下载
- 积分：1
-
AD9957
ad9957的资料，内含有命令字生成器，适合使用该芯片的开发人员(ad9957 data, contains the command word generator for developers using the chip)
- 2011-10-27 22:06:55下载
- 积分：1
-
基于alteraCPLD芯片的VHDL点阵滚动显示源代码
基于alteraCPLD芯片的VHDL点阵滚动显示源代码-VHDL-based alteraCPLD chip dot matrix rolling display the source code
- 2022-04-25 07:41:48下载
- 积分：1
-
VHDL programming language introduced the basic grammar, and some programming exa...
介绍了ＶＨＤＬ编程语言的基本语法，和一些编程实例-VHDL programming language introduced the basic grammar, and some programming examples
- 2023-02-13 15:55:04下载
- 积分：1
-
M4A564/32 CPLD VHDLＡ程序，调试可用,51扩展.
M4A564/32 CPLD VHDLＡ程序，调试可用,51扩展.-M4A564/32 CPLD VHDLA procedures, debugging is available, 51 to expand.
- 2023-08-25 16:25:03下载
- 积分：1
