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cic_4_dec
实现4倍抽取的CIC抽取滤波器模块的Verilog实现，在对数据进行抽取之前，首先进行滤波(Extracted 4 times realize CIC decimation filter module Verilog realize that in the data collected before the first filter)
- 2008-07-08 16:23:03下载
- 积分：1
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rs_decode_31
RS码的FPGA编码文件，QUARTUS工程(The RS codes FPGA encoded file, QUARTUS engineering)
- 2013-03-11 19:21:46下载
- 积分：1
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pipelined_fft_256
verilog编写的并行256点fft代码(Verilog prepared parallel 256 points fft code)
- 2017-06-28 21:56:53下载
- 积分：1
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zobrazenie_16_bit_cisla_paralel
16 bit switch input view in hexa format on 7seg display
- 2013-08-16 00:50:49下载
- 积分：1
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CAN
说明： ZYNQ中 PS 端 CAN接口的基本使用方法，并通过 CAN接口实现与 PC 端 CA N调试软件之间的数据接收和发送(The basic use method of PS end can interface in zynq, and the data receiving and sending with PC end can debugging software through can interface)
- 2020-04-03 16:41:52下载
- 积分：1
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lsd
按键控制LED流水灯；按键1按下前8个灯从左到右依次点亮，按键2按下中间前8个灯从左到右依次点亮，按键3按下所有灯全亮(Water control button LED lights sequentially lit buttons the eight lights left to right 1 Press button 2 press from left to right is lit in the middle eight lights, key 3 Press All full bright light)
- 2012-10-17 18:23:36下载
- 积分：1
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LDPC
LDPC Encoding Ebook Tetourial code
- 2021-03-23 08:49:15下载
- 积分：1
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I2C_CSDN
verilog 编写的I2C程序，控制D/A的(I2C program written by Verilog to control D/A)
- 2020-06-18 21:20:02下载
- 积分：1
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这是介绍嵌入式开发相关的资料。有总线与内存的操作
这是介绍嵌入式开发相关的资料。有总线与内存的操作-introduced Embedded Development relevant information. Bus and a memory operation
- 2023-09-02 05:05:15下载
- 积分：1
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multiplier.tar
用vhdl实现的booth算法乘法器，包含了multiplexer和rca adder，同时提供了一个测试文件，modelsim测试通过(Algorithm with a booth multiplier vhdl implementation, including a multiplexer and rca adder, while providing a test file, modelsim test pass)
- 2021-04-14 13:18:55下载
- 积分：1
