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FPGA
基于FPGA的频率相位可调DDS信号发生器-FPGA-based phase adjustable frequency DDS signal generator
- 2022-01-26 08:17:52下载
- 积分:1
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Nexys 3 的分频器
这个代码可以用来分裂振荡器的频率和产生 1 赫兹信号从 100 兆赫的 vhdl 语言使用的 Nexys 3 板。
这可以用作闹钟或数字时钟中的组件数秒。
- 2022-01-26 06:21:16下载
- 积分:1
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polyphaseFIR_1v0
polyphase fir dilter
- 2016-02-19 21:32:07下载
- 积分:1
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64point_FFT
64点FFT代码 基4算法 Verilog(64-point FFT code radix-4 algorithm Verilog)
- 2021-01-15 09:48:46下载
- 积分:1
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LED 闪烁的VHDL代码
LED闪烁的VHDL代码
- 2022-07-28 10:23:55下载
- 积分:1
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verilog2
Learning Verilog Chinese Version Part 2
- 2012-06-15 03:24:15下载
- 积分:1
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VHDL digital system design and engineering practice 4, including the principles,...
VHDL数字系统设计和工程实践5,包含原理,真值表和原理图,以及VHDL源代码.-VHDL digital system design and engineering practice 4, including the principles, truth table and schematic, as well as VHDL source code.
- 2022-08-11 13:48:51下载
- 积分:1
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一个用于锁相环开发的资料,请作为参考!
一个用于锁相环开发的资料,请作为参考!-A phase-locked loop for the development of the information, please as a reference!
- 2022-11-15 16:30:03下载
- 积分:1
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adc_dac
ADC-DAC transmittion works thru SPI on 25 MHZ. Used for some student project on Xilinx sprtan3a FPGA
- 2016-12-01 19:44:33下载
- 积分:1
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FPGA2-DSP2-EDMA
例程是基于quartus的,FPGA通过EMIF给DSP发送数据,里面包含了一个简单的状态机和一个基于IP核的fifo,适合初学者(Routine is the FPGA to send data to the DSP via EMIF, which contains a simple state machine and an IP-based core fifo, suitable for beginners)
- 2020-12-04 16:09:24下载
- 积分:1