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fifo的IP核的调用和仿真
fifo的IP的调用在我们的项目中能够缩短设计周期,省去了编写代码的复杂过程,也省去了调试程序的复杂程度和代码的复杂程度。这个小小的简单的fifo的IP核的调用能够让大家更清晰明了的理解fifo的工作原理和IP核调用的方法。
- 2022-01-22 04:07:21下载
- 积分:1
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XUAN-ZHUAN-led
旋转LED 实现自适应转速 字幕滚动 对接的程序(Rotating LED Adaptive Speed subtitles scroll docking program)
- 2013-02-06 16:17:56下载
- 积分:1
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fwwallace
wallace tree multiplier in verrilog
- 2013-03-19 00:15:07下载
- 积分:1
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defog
说明: 图像去雾算法FPGA实现,使用xilinx Vivado开发环境(Image dehazing algorithm FPGA implementation using xilinx Vivado development environment)
- 2021-02-18 15:49:45下载
- 积分:1
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openmips
一个开源mips处理器verilog 源码(wishbone interface wishbone interface)
- 2020-08-16 15:48:32下载
- 积分:1
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频率计
说明: 1、能正确显示输入信号频率;
2、测量频率范围为1Hz ~ 999999Hz;
3、测量结果以十进制数字显示;
4、能测量幅值较小的信号频率;
5、有自动刷新输出数据的功能(如5s刷新一次);
6、有自检模块(如产生100Hz的校准方波);(1. It can correctly display the input signal frequency;
2. The frequency range of measurement is 1Hz ~ 99999hz;
3. The measurement results are displayed in decimal;
4. It can measure signal frequency with small amplitude;
5. It has the function of automatically refreshing the output data (e.g. once in 5S);
6. Self checking module (such as generating 100Hz calibration square wave);)
- 2020-03-28 16:37:56下载
- 积分:1
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Cordic_matlab
实现自然对数运算的cordic算法的matlab浮点仿真,以及针对FPGA硬件平台的定点仿真测试(Achieve natural logarithm of cordic algorithm matlab floating point emulation, and FPGA hardware platform for fixed-point simulation testing)
- 2013-11-01 15:10:09下载
- 积分:1
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EDAcodelock
能够在EDA环境下实现四位十进制数字密码锁的设置与开锁功能,并能更改使用密码,还可以防止抖动(EDA environment to achieve four decimal code lock and unlock function of the settings and change the use of passwords, but also to prevent the jitter)
- 2009-05-07 09:44:30下载
- 积分:1
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test1
利用matlab,对偏振控制器进行仿真,最终在邦加球上进行显示(Using matlab, simulation of the polarization controller eventually be displayed on the Poincare Sphere)
- 2013-04-07 10:42:15下载
- 积分:1
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performance with rayleigh
matlab bpsk with rayleigh performance expirement
- 2020-06-24 21:40:01下载
- 积分:1