网站首页

Designing Digital Down Conversion Systems with Altera CIC MegaCore and FIR Compe...

于 2022-02-02 发布文件大小:53.19 kB

 0  129

下载积分: 2 下载次数: 1

我要下载

代码说明：

Designing Digital Down Conversion Systems with Altera CIC MegaCore and FIR Compensation Filter v6.1

下载说明：请别用迅雷下载，失败请重下，重下不扣分！

发表评论

0 个回复

Nexys-4-DDR-XADC
Nexys-4-DDR-XADC 开发板demo(Nexys-4-DDR-XADC e.v. Board demo)

2018-12-07 15:33:22下载

积分：1
八路AD采集adc128s022
FPGA AD采集八路数据，12位分辨率，小梅哥FPGA的开发程序，实测可用(FPGA AD collects eight path data, 12 bit resolution, and the development program of Mayo FPGA.)

2020-12-17 16:59:11下载

积分：1
775dbfc273b27329d455f8257e85d839cc5d
CPFSK Demodulation Techniques

2018-09-18 17:31:30下载

积分：1
design of 1-bit memory using cmos logic
&单元格

2022-02-04 02:43:34下载

积分：1
suoxianghuan
常用的锁相环技术，此程序是我在设计高频电路中运用的，具体见程序，经调试无问题(Commonly used phase-locked loop technology, this program is in the design I used in high-frequency circuits, see the specific procedures, no problem by debugging)

2008-08-19 12:02:31下载

积分：1
ofdm_baseband_design_basedon_fpga
基于Xilinx FPGA的OFDM通信系统基带设计一书的源代码 (this is source code from a book)

2013-06-13 22:13:52下载

积分：1
vga_driver
verilog语言设计的VGA驱动。在Quarus11.0下编译成功，并在Altera cyclone4开发板上测试OK(verilog language design VGA driver. In Quartus11.0 successfully compiled and Altera cyclone4 development board test OK)

2016-05-25 17:19:18下载

积分：1
uart_tr(3)
uart_tr 异步串口通信主机使用verilog HDL语言编写(uart_tr the host of the uart )

2015-06-08 21:02:17下载

积分：1
demo_as32ttl1w
说明：可以获取各种字符，并在数码管显示出来，非常的靠谱且稳定(Various characters can be acquired and displayed on the digital tube.)

2020-06-16 15:00:02下载

积分：1
spi_master_sent
在FPGA平台实现SPI传输协议开发，SPI为三总线式。(Implementation of SPI transmission protocol development on FPGA platform)

2020-08-02 08:18:35下载

积分：1

696516资源总数
106571会员总数
2今日下载

Designing Digital Down Conversion Systems with Altera CIC MegaCore and FIR Compe...

0 个回复

热门标签

热门下载