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xadc_temperature
说明: 用于FPGA中zynq的温度上报,通过逻辑方式。(It is used to report the temperature of zynq in FPGA by logic)
- 2019-12-18 11:47:43下载
- 积分:1
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Slave-FIFO
详细讲解Slave FIFO模式下的初始化设置和相对应寄存器说明(Explain in detail the initial setup Slave FIFO mode and the corresponding register description)
- 2014-03-18 17:33:23下载
- 积分:1
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adaptive
这是基于MATLAB编程实现自适应滤波器,并在XILINX的FPGA上硬件可实现的模型文件(This is based on the MATLAB programming adaptive filter, and the XILINX' s FPGA hardware can be a model document)
- 2009-06-24 13:26:32下载
- 积分:1
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uart_slip
说明: 实现串口通讯以及SLIP协议传输数据,增加了特殊字符的转义(Realization of Serial Communication and SLIP Protocol)
- 2021-01-19 18:58:41下载
- 积分:1
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stm8uart
Demo program for use UART STM8S
- 2013-09-05 03:18:35下载
- 积分:1
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mux21a
在VHDL结构体中用于描述逻辑功能和电路结构的语句分为顺序语句和并行语句两部分,顺序语句的执行方式十分类似于普通软件语言的程序执行方式,都是按照语句的前后排列方式顺序执行的。(VHDL structure in the body used to describe the logic function and circuit structure of the order of statements and expressions are divided into two parts in parallel statement, modalities for the implementation of the order of statement is very similar to ordinary language software program implementation, are in accordance with the statements before and after the arrangement of the order implementation.)
- 2008-12-24 18:25:20下载
- 积分:1
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gold
基于vhdl语言的15位gold序列的设计的开端一部分程序(Vhdl language based on sequences of the 15 gold as part of the beginning of the design process)
- 2011-05-16 21:48:38下载
- 积分:1
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er
秒表 东北大学秦皇岛分校 电子设计自动化 实验(Stopwatch Northeastern University at Qinhuangdao electronic design automation experiment)
- 2012-06-27 02:25:14下载
- 积分:1
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sram_test_OK
主要是基于FPGA(EP2C8Q208I8)下的SRAM驱动,SRAM型号为IS61LV25616,程序语言为Verilog,开发环境为quartusII 7.0,为一工程,可直接下载到FPGA中,含电路图(Mainly based on FPGA (EP2C8Q208I8) driving under the SRAM, SRAM model IS61LV25616, programming language for Verilog, a development environment for quartusII 7.0, for a project, can be downloaded directly to the FPGA, including circuit diagrams)
- 2014-12-24 22:08:36下载
- 积分:1
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DDS_BPSK
基于DDS的BPSK调制器设计Verilog源码( U57FA u4E8.08 u868)
- 2017-04-28 11:44:46下载
- 积分:1