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frequency divider
FPGA对系统50M时钟进行分频。FPGA最基本功能基础(FPGA Verilog program, key detection, program jitter elimination, jitter elimination, delay detection keys)
- 2019-04-27 23:35:12下载
- 积分:1
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matlab123
多个MATLAB设计滤波器的方法程序以及图形实现(number MATLAB filter design methods and procedures and Graphics)
- 2006-12-27 23:07:56下载
- 积分:1
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zuixiangxide_NIOS_kaifajiaocheng
来自于NIOSII的那些事,该书详细地介绍了NIOSS的使用过程,非常适合初学者。(From the NIOSII those things, the book are detailed in this paper NIOSS use process, very suitable for beginners.
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- 2011-12-13 11:33:57下载
- 积分:1
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fir.tar
FIR滤波器的VHDL语言实现(The implement of FIR Filter based on VHDL)
- 2004-10-19 10:14:56下载
- 积分:1
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Pipeline-2
Pipeline processor verilog components
- 2012-12-21 17:53:18下载
- 积分:1
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IQ解调器
我必须做智商演示项目。我不知道写代码verilog.so版本请提供matlab和verilog在fpga中的编码实施iq解调器由以下模块组成:射频调制信号、混频器、低通过滤.it包含同相分量、正交分量。
- 2023-05-28 12:45:02下载
- 积分:1
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手把手教你学FPGA 仿真篇
手把手教你学FPGA 仿真篇,简单实用。(Hand in hand teach you to learn FPGA simulation, simple and practical.)
- 2018-07-09 21:25:09下载
- 积分:1
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MAC
在FPGA硬件上,使用verilog语言编写的一个乘累加器程序。(FPGA hardware, a multiply accumulator verilog language program.)
- 2012-10-18 20:28:25下载
- 积分:1
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fpga
Once the FPGA is located, the rest of the mapping data for the other components can be determined dynamically its section mapping registers.
- 2015-11-05 20:55:50下载
- 积分:1
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DC_EX verilog 实现
pipeline 的基础,用于各种technique 的 test bench.
- 2022-02-14 05:22:35下载
- 积分:1