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图书馆的IEEE
LIBRARY IEEE
USE IEEE.STD_LOGIC_1164.ALL
USE IEEE.STD_LOGIC_ARITH.ALL
USE IEEE.STD_LOGIC_UNSIGNED.ALL
- 2022-03-24 00:58:30下载
- 积分：1
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prueba
Test for VHDL just a student version
- 2016-11-17 18:49:33下载
- 积分：1
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本实验实现PS/2接口与RS
本实验实现PS/2接口与RS-232接口的数据传输，
PS/2键盘上按下按键，可以通过RS-232自动传送到主机的串口调试终端上（sscom32.exe）；
并在数据接收区显示接收到的字符。
串口调试终端的设置：波特率115200，一个停止位，无校验位。-Realize this experiment, PS/2 interface with RS-232 data interface, PS/2 keyboard to press the button, through RS-232 automatic transmission to the host serial debug terminal (sscom32.exe) and data receiving display received characters. Serial debug terminal settings: 115200 baud rate, one stop bit, no parity bit.
- 2022-08-08 00:57:00下载
- 积分：1
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how-to-use-modelsim
逐步演示试用modelsim建立仿真的过程，初学者应该看看(Step by step demonstration of the trial to establish modelsim simulation process, beginners should look at the)
- 2009-04-17 09:13:35下载
- 积分：1
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Flicker_LED
It s Flicker_LED code.Verilog for MaxV.
- 2013-08-08 10:16:32下载
- 积分：1
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performance with rayleigh
说明： matlab bpsk with rayleigh performance expirement
- 2020-06-24 21:40:01下载
- 积分：1
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frequency divider
说明： FPGA对系统50M时钟进行分频。FPGA最基本功能基础(FPGA Verilog program, key detection, program jitter elimination, jitter elimination, delay detection keys)
- 2019-04-27 23:35:12下载
- 积分：1
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FPGA
基于FPGA的VHDL编程实现各种音频信号，采用的是周立功公司的fusion_startkit开发板。-FPGA-based VHDL Programming realize a variety of audio signals, are used by companies fusion_startkit weeks Ligong development board.
- 2022-07-15 20:29:13下载
- 积分：1
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PCI arbitor VHDL
PCI Arbitor by VHDL -PCI Arbitor by VHDL
- 2022-03-18 15:09:07下载
- 积分：1
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20071026_091831_632
SOPC基于MATLAB与DSP Builder设计技术
实验使用说明，非常详细，易于上手(dsp builder)
- 2009-04-01 14:44:16下载
- 积分：1
