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CNA总线协议控制器Verilog
This CAN Controller was tested with the Bosch VHDL Reference Model and
passed all the tests. Because of the licensing issue it can not be
published on the Opencores web site.
The Can Controller was also implemented in real HW (12 boards
were constantly talking to each other).
The included test bench is not a real test bench and should be improved.
However a volunteer is needed for such a job. I can provide some help
but am not willing to write it by myself.
- 2022-05-26 04:35:56下载
- 积分：1
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gmsk
产生高斯最小相移键控信号的阐述仿真，包括调制解调、信道模型等。(Simulation program to realize GMSK transmission system)
- 2020-11-14 19:49:42下载
- 积分：1
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RS_CC_ENC
OFDM系统新型CC编解码的verilogHDL设计，与RS编码级联，经测试误码率性能提高(OFDM system verilogHDL new CC codec design, coding and RS cascade, tested BER performance improvement)
- 2020-12-31 10:58:59下载
- 积分：1
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Meyers-Wavelet.txt
Meyers wavelet. DWT VHDL.
- 2011-10-10 22:01:44下载
- 积分：1
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mif
使用metlab生产正弦波和三角波的采样值，供vhdl等语言调用来产生波形(use metlab production sine wave and triangular wave of sampling, for languages such as call vhdl to generate waveforms)
- 2007-05-15 15:51:39下载
- 积分：1
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sd_ctrl
利用verilog实现对SD卡的控制，可以实现对SD卡的读写。(Verilog SD)
- 2020-12-27 21:49:03下载
- 积分：1
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SineGen
Basic VHDL code to create a sine wave generator for an FPGA board.
- 2014-01-24 01:04:15下载
- 积分：1
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FPGA实现四位数与四位数乘法
FPGA实现四位数与四位数乘法，有仿真波形，合理利用FPGA资源(Four-digit and four-digit multiplication is realized by using FPGA. It has simulation waveform and makes rational use of the resources of the FPGA.)
- 2020-06-21 00:00:02下载
- 积分：1
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FIR verilog
应用背景
FIR(Finite Impulse Response，有限冲击响应)数字滤波器具有稳定性高、可以实现线性相位等优点，广泛被应用于信号检测与处理等领域[1,2]。由于FPGA(Field Programmable Gate Array，现场可编程门阵列)基于查找表的结构和全硬件并行执行的特性，如何用FPGA 来实现高速FIR 数字滤波器成了近年来数字信号处理领域研究的热点。目前，全球两大PLD 器件供应商都提供了加速FPGA 开发的IP(IntelligentProperty，知识产权)核[3]。本文在Altera 公司的FIR 数字滤波器IP 核的基础上，设计了基于分布式算法的FIR数字低通滤波器。
关键技术实现滤波器的功能，有限冲激响应（
- 2022-08-10 00:07:33下载
- 积分：1
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FPGA芯片亚稳态参数测试代码
资源描述在FPGA器件上测试芯片的亚稳态参数的测试方法代码
- 2022-07-04 20:54:44下载
- 积分：1
