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add
浮点加法器的用Verilog实现，32位的浮点加法器(Floating point adder Verilog)
- 2021-02-28 12:49:35下载
- 积分：1
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2MW_wind_grid_inverter
针对兆瓦级风电并网逆变器主电路研制中存在的并联扩容、开关频率较低和LCL滤波器难以优化设计等问题，提出了采用交流侧串接电感再进行并联的均流方案，采用载波移相技术提高变流器的等效开关频率，提出了LCL滤波器的设计原则，并给出了上述设计的理论依据和实现方法。通过对2兆瓦风电变流器主电路的仿真验证了上述技术方案。(MW-class wind power for grid-inverter main circuit of the parallel development of existing capacity, a lower switching frequency and LCL filter design difficult to optimize the problem, a series inductor AC side in parallel are further flow program, the use of carrier phase-shifting technology to enhance the equivalent converter switching frequency, a LCL filter design principles, and gives the above-mentioned theoretical basis for the design and implementation. 2 MW of wind power converter main circuit simulation program to verify the above-mentioned technology.)
- 2009-04-28 09:16:38下载
- 积分：1
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bishe
基于FPGA 的VGA波形显示，dds产生三角波正弦波(Vga waveform display based on FPGA, using DDS to generate sinusoidal triangular wave)
- 2018-12-12 11:26:37下载
- 积分：1
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adrv9009_fmcomms8_sync_test_bash
说明： adrv9009的测试平台的测试脚本，适合新人参考(Adrv9009 test platform test script, suitable for new reference)
- 2020-08-03 08:50:49下载
- 积分：1
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PSK
实现psk调制解调，vhdl代码，仿真文件也有(psk shixian tiaozhiyujietiao)
- 2013-04-10 14:24:53下载
- 积分：1
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aiqingmaimai
数字钟蜂鸣器音乐——爱情买卖，很时尚的闹钟音乐代码，经测试，很有感觉。(Digital clock buzzer music- love trading, very stylish alarm clock music code, tested, great feeling.)
- 2020-12-28 01:19:01下载
- 积分：1
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DDSa
程序是完整的一个数字下变频器的一个Verilog程序，经测试可以使用，欢迎下载(Program is a complete Verilog program a digital down converter, tested can be used, please download)
- 2016-05-23 22:11:25下载
- 积分：1
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dr6—ise-F
用FPGA开发板的按键作为电子表的时间初值设置控制信号，数码管当前时间值输出。用按键选择分别输出：分、秒、1/10秒。(With FPGA development board button, as the time value of the electronic table, set the control signal, digital tube current time value output. Select output by buttons: minutes, seconds, and 1/10 seconds.)
- 2017-10-11 21:19:55下载
- 积分：1
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fir 滤波，分块缩放
图像处理，支持14阶的fir滤波，x方向分块缩小
- 2022-06-16 22:27:19下载
- 积分：1
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conv_encoder
TD-LTE中（3.1.7）咬尾卷积码编码器verilog代码(Tail-biting convolutional code encoder verilog code)
- 2014-04-09 11:12:43下载
- 积分：1
