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yuanchengxu
基于Verilog HDL的通信系统设计(Design of communication system based on Verilog HDL)
- 2011-11-19 13:36:54下载
- 积分：1
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Norflash
用verilog hdl写的Norflash控制器，可实现单字节读写，扇区擦除。(Norflash controller edit by Verilog hdl,it can read or write by Byte,or erase the sector.)
- 2021-03-29 16:29:11下载
- 积分：1
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Altera in the official line on the SOPC custom component (PWM) of the examples a...
Altera官网上关于SOPC中自定义组件（PWM）的实例，官网上现在没了。。可很多书上都在用-Altera in the official line on the SOPC custom component (PWM) of the examples are not the official line. . Can be a lot of books are in use. . .
- 2022-02-04 13:32:48下载
- 积分：1
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RS_coder
基于verilog的RS编码器 绝对实用(Based on the RS encoder verilog absolute utility)
- 2010-12-07 20:51:02下载
- 积分：1
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RX_RS_DEC
OFDM系统新型RS编解码的verilogHDL设计，经测试误码率性能提高(OFDM system verilogHDL new RS codec design, improved bit error rate performance tested)
- 2020-12-31 10:59:00下载
- 积分：1
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PL_2FSK
基于VHDl的2FSK调制！用的是altera的quartus11软件(Based on VHDl the 2FSK modulation)
- 2012-12-13 17:20:54下载
- 积分：1
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方形伺服电机 vhdl
PROGRAMM有助于使40厘米见方与FPGA机器人改变board.The运动遵循顺时针旋转。此外，惯性中心的旋转过程中保持不动。
- 2022-02-14 00:56:00下载
- 积分：1
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an example HDL
an example HDL-Core with any basic gates.
- 2022-12-05 05:05:03下载
- 积分：1
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FPGA_homewrk4
设计一个能求出一个32bit字中两个相邻0之间最大间隙的电路。完成HDL设计及testbench描述，给出综合后的时序仿真结果。提交纸质文档。(Design a circuit that can find the maximum gap between two adjacent 0 in a 32bit word. The HDL design and testbench description are completed, and the result of comprehensive simulation is given. Submit paper documents.)
- 2018-05-07 17:54:12下载
- 积分：1
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fre
本设计是基于EP4CE15F17C8N和12864液晶的频率计程序(The design is based EP4CE15F17C8N and 12864 LCD frequency meter program)
- 2015-08-12 08:39:32下载
- 积分：1
