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DLL经典教材,我做成了word文档,可以直接打印出来.
DLL经典教材,我做成了word文档,可以直接打印出来.-DLL classical teaching, I made a word document, and can directly print out.
- 2022-02-15 04:45:49下载
- 积分：1
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Source Insight Source Insight是一个革新的面向项目开发的程序编辑器和代码浏览器，它拥有内置的对C/C++, C#和Java等程序的分...
Source Insight Source Insight是一个革新的面向项目开发的程序编辑器和代码浏览器，它拥有内置的对C/C++, C#和Java等程序的分析。Source Insight能分析你的源代码并在你工作的同时动态维护它自己的符号数据库，并自动为你显示有用的上下文信息。Source Insight不仅仅是一个强大的程序编辑器，它还能显示reference trees，class inheritance diagrams和call trees。Source Insight提供了最快速的对源代码的导航和任何程序编辑器的源信息。就将Source Insight应用到你的项目开发过程中并切实感受它为你项目开发的效率带来的变化。-Source Insight Source Insight is an innovative project-oriented development program editor and code browser, it has a built-in on C/C++, C# And Java procedures such as analysis. Source Insight to analyze your source code and in your work at the same time the dynamic maintenance of its own symbols database, and automatically shows you the context of useful information. Source Insight is not only a powerful program editor, it can display reference trees, class inheritance diagrams and call trees. Source Insight provides the most rapid of the source code navigation and any program editor source of information. Source Insight will be applied to your project development proce
- 2022-03-02 15:59:49下载
- 积分：1
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FPGA pipelined designs on paper This work investigates the use of very deep pipe...
关于FPGA流水线设计的论文
This work investigates the use of very deep pipelines for
implementing circuits in FPGAs, where each pipeline
stage is limited to a single FPGA logic element (LE). The
architecture and VHDL design of a parameterized integer
array multiplier is presented and also an IEEE 754
compliant 32-bit floating-point multiplier. We show how to
write VHDL cells that implement such approach, and how
the array multiplier architecture was adapted. Synthesis
and simulation were performed for Altera Apex20KE
devices, although the VHDL code should be portable to
other devices. For this family, a 16 bit integer multiplier
achieves a frequency of 266MHz, while the floating point
unit reaches 235MHz, performing 235 MFLOPS in an
FPGA. Additional cells are inserted to synchronize data,
what imposes significant area penalties. This and other
considerations to apply the technique in real designs are
also addressed.-FPGA pipelined designs on paper This work invest
- 2022-11-28 12:05:03下载
- 积分：1
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vc++技术内幕源码.zip
vc++技术内幕源码.zip-vc insider source technology. Zip
- 2023-06-20 10:05:05下载
- 积分：1
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详细介绍VC++6.0环境下利用WIN API函数来实现与符合HID设备类的USB接口通信...
详细介绍VC++6.0环境下利用WIN API函数来实现与符合HID设备类的USB接口通信-VC++6.0 USB Commutication
- 2022-01-25 23:06:57下载
- 积分：1
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经典perl学习手册，通过这本书，可以很快上手perl程序编程
经典perl学习手册，通过这本书，可以很快上手perl程序编程-classic perl document
- 2023-09-03 03:35:04下载
- 积分：1
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清华大学网络管理讲义
清华大学网络管理讲义-Network Management, Tsinghua University lectures
- 2022-05-06 15:04:32下载
- 积分：1
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讲述VC6.0语法的手册，编程必备。
讲述VC6.0语法的手册，编程必备。-VC6.0 about grammar manuals, programming required.
- 2022-02-11 15:32:42下载
- 积分：1
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MICRF505DEV
MICRF505DEV
- 2023-02-23 22:50:04下载
- 积分：1
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北京工业大学06年信号与系统试题考研和做信号与系统试题的可以看一下...
北京工业大学06年信号与系统试题考研和做信号与系统试题的可以看一下-Beijing University of Signals and Systems in 2006 and the study section of the test signal with the system so the can look at questions
- 2022-07-04 07:33:46下载
- 积分：1
