-
VGA的IP核,下载即可用,解压到指定目录下就可以了,参照里面的read me....
VGA的IP核,下载即可用,解压到指定目录下就可以了,参照里面的read me.-VGA
- 2022-02-02 20:02:28下载
- 积分:1
-
16b20b_Encoder
16b20b encoder and decoder
- 2013-02-04 13:24:46下载
- 积分:1
-
SVPWM_FPGA_ContainSourceCode
广东工业大学硕士论文《SVPWM算法优化及其FPGA/CPLD实现》,在详细分析经典SVPWM算法基础上,提出一种优化算法,并在FPGA上实现。论文附录包含VHDL源码。(Guangdong University Thesis " SVPWM algorithm to optimize its FPGA/CPLD realization" in the detailed analysis of the classical SVPWM algorithm is proposed based on an optimization algorithm, and implemented on FPGA. Paper appendix contains VHDL source code.)
- 2013-12-30 16:00:11下载
- 积分:1
-
the_last
VHDL语言实现两个人掷骰子游戏,最多6次,大者胜则结束游戏并在点阵上显示,一直平手则一直进行直到达到6次。(Achieving the dice game between two people by using VHDL language.The maximum number of times is 6.The game will over when there is a biger one in one time,otherwise,the game will continue until the time of the game is up to 6.)
- 2021-01-21 12:18:42下载
- 积分:1
-
altera fpga verilog 设计的基于查找表的DCT程序及zigzag扫描程序,已经过matlab 和modelsim
验证,文件中包含TEST...
altera fpga verilog 设计的基于查找表的DCT程序及zigzag扫描程序,已经过matlab 和modelsim
验证,文件中包含TESTBENCH ,直接可用-altera fpga verilog design table DCT-based search procedures and zigzag scanning procedures, and ModelSim matlab has been verified, the document contains TESTBENCH, directly available
- 2022-05-31 13:50:54下载
- 积分:1
-
rs_encoder
RS编码器的fpga实现,有TESTBench(RS encoder to achieve the fpga, and TESTBench)
- 2009-06-24 11:37:04下载
- 积分:1
-
12864hanzixianshi
基于FPGA 的12864液晶显示汉字,用verilog编写的。(12864 liquid crystal display Chinese characters based on FPGA, written in verilog.)
- 2021-04-27 15:48:44下载
- 积分:1
-
vhdl classical source code
vhdl经典源代码――ps2接口设计,入门者必须掌握-vhdl classical source code-- ps2 interface design, beginners must master
- 2022-04-07 18:12:38下载
- 积分:1
-
用VHDL编写的串口通讯程序,包括几个不同的程序例子,也可以用verilog进行改写。...
用VHDL编写的串口通讯程序,包括几个不同的程序例子,也可以用verilog进行改写。
- 2023-09-04 22:05:02下载
- 积分:1
-
txt_util
VHDL库,仿真时使用的,包括打印,类型转换等实用的操作(Practical operation VHDL library, using simulation, including print, type conversion, etc.)
- 2014-05-23 13:07:31下载
- 积分:1