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测试人体视觉的反应时间,可以作为vhdl编程的练习之用,也可以更进一步的开发成为具有商业价值的产品,这里面只是能够实现测试人体视觉反应时间的基本功能的程序...
测试人体视觉的反应时间,可以作为vhdl编程的练习之用,也可以更进一步的开发成为具有商业价值的产品,这里面只是能够实现测试人体视觉反应时间的基本功能的程序-Test of human visual reaction time, can be used as VHDL programming exercises used can also be further developed into products with commercial value, there is only able to realize the human visual reaction time test the basic functions of the procedures
- 2022-10-07 16:40:02下载
- 积分:1
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tpc_decode_vhdl
基于VHDL的TPC译码器的设计,简述了tpc译码的算法步骤,tpc硬件实现的模块和部分vhdl程序(TPC decoder VHDL-based design, outlines the decoding algorithm steps tpc, tpc hardware modules and some vhdl program)
- 2020-11-20 10:59:37下载
- 积分:1
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CODE_VHDL_COUNTING 0 到 9 (慈 0 đến 9 Đếm hiển đoạn 施耐 1 带领 7)
CODE_VHDL_COUNTING 0 到 9 (慈 0 đến 9 Đếm hiển đoạn 施耐 1 带领 7)
- 2023-04-13 10:55:04下载
- 积分:1
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osiclator LED
应用背景弗鲁托PA oscilar就像联合国领导是卡瓦依,zholo罗该为什么我需要一个接着一个普通该estudielo为什么deberia darselo masticado关键技术zh0lo VHDL l0ks,就像PA presumir Y阙我书房一个接着一个普通免费,但四sintetiza Y有她comportamiento寺特拉华入伍机构sincronizar O把一osiclar DOS LED
- 2022-11-27 18:40:03下载
- 积分:1
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three_motor
matlab仿真MATLAB电机仿真精华50例--源代码异步电机\asymotor_stator.mdl
- 2010-01-16 22:02:43下载
- 积分:1
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UART异步串行通信协议的源代码,采用VHDL语言…
uart异步串口通信协议的源代码,用vhdl语言编写,并且有完整得测试文件-UART asynchronous serial communication protocol source code, using VHDL language, and may have a complete test file
- 2022-03-20 22:18:17下载
- 积分:1
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XilinxFpgaDesignAndTest
Xilinx fpga 设计培训中文教程,比较好的学习FPGA入门的教程(Xilinx fpga design training for Chinese curricula, better start learning FPGA Tutorial)
- 2020-08-13 15:58:30下载
- 积分:1
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超大规模集成电路的VHDL基本编码…………
- 2022-03-26 19:32:17下载
- 积分:1
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verilog prescaler for the realization of the odd
verilog实现的奇数分频器 针对任何规模的奇数分频-verilog prescaler for the realization of the odd-numbered odd-numbered points of any size-frequency
- 2022-08-08 15:56:02下载
- 积分:1
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tsobbellh
这是我本人自己开发的可用于256*256大小的图像进行sobel边缘检测的vhd文件,可在QuartusII或MaxplisII下综合与与仿真,并在FPGA上测试过。能进行修改支持其他大小图像的sobeel边缘检测,同时还能实现其它的图像模块化处理算法,例如高斯滤波,平滑等。
(This is my own development vhd file, can be used for 256* 256 size image sobel edge detection under QuartusII or MaxplisII synthesis and with simulation, and tested on FPGA. Can be modified to support other sobeel size image edge detection, while still achieving other image the modular processing algorithms, such as Gaussian filtering and smoothing.)
- 2012-08-23 22:17:19下载
- 积分:1