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PCIE
xilinx spartan6的pcie pio源代码(xilinx spartan6 pcie pio demo)
- 2020-11-25 14:39:32下载
- 积分：1
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ddr3_sun
使用DDR3IP核进行仿真，写入读取数据(Using DDR3IP core to simulate, write and read data)
- 2021-01-07 00:48:53下载
- 积分：1
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switch--circuit
最近交互式电源技术，软交换、同步整流、频率固定(Alternating expressions Power technology recently、Softswitch, synchronous rectification, fixed frequency)
- 2013-11-25 15:56:17下载
- 积分：1
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sobel
这是本人自己编写的可用于256*256大小的图像进行sobel边缘检测的vhd文件，可在QuartusII或MaxplisII下综合和仿真，并在FPGA上测试过。可以进行修改支持其他大小图像的sobel边缘检测，同时还可以实现其它的图像模块化处理算法，例如高斯滤波，平滑等。(this is my own preparation for the 256* 256 size of the image segmentation Edge Detection vhd document in the next QuartusII or MaxplisII integrated and simulation, and the FPGA tested. Can be adapted to support other size image segmentation edge detection, It can also achieve other modular image processing algorithms, such as Gaussian filtering, smoothing and so on.)
- 2020-07-09 21:08:55下载
- 积分：1
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VHDL-Code-For-Full-Adder-By-Data-Flow-Modelling
VHDL Code For Full Adder By Data Flow Modelling
- 2013-11-08 00:39:04下载
- 积分：1
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verilog实现的1024位的大数模逆算法，引入RAM作为数据通道
verilog实现的1024位的大数模逆算法，引入RAM作为数据通道-verilog to achieve the 1024 Modular inverse algorithms, the introduction of RAM as a data channel
- 2022-12-18 20:35:03下载
- 积分：1
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Verilog
verilog编程语言的讲解，有电子科技大学出版(verilog programming language to explain, there is the University of Electronic Science and Technology Publishing)
- 2013-08-14 09:21:43下载
- 积分：1
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float_multi
说明： FPGA Verilog浮点数乘法运算，采用单精度浮点型小数格式，运算结果精度可设置，可封装成IP核(FPGA Verilog floating-point multi operation, using single precision floating-point decimal format, the accuracy of the operation results can be set, can be packaged into IP core)
- 2020-07-02 01:20:01下载
- 积分：1
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generic_dpram
IT IS THE DP MEMORY MODULE. IT CONTROLS THE DP MEMORY
- 2013-09-30 19:03:40下载
- 积分：1
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DSP--PFPGA
在FPGA中编写FPGA芯片与DSP28335进行通信的程序(FPGA chip and DSP28335 written in FPGA communication program)
- 2015-02-02 18:46:25下载
- 积分：1
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