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ep9351_read_reg
ep9351芯片的一个读取寄存器的测试程序,因为他的读取方式跟别的i2c设备不同,所以重新封装了一些i2c读写的接口。(one read ep9351 chip registers testing procedures, because he read i2c device with another different way, so repackaging some i2c interface to read and write.)
- 2015-06-08 10:18:54下载
- 积分:1
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数字秒表的VHDL设计,能精确到百分秒,在6位数码管上显示,分别有秒,分,小时,通过目标芯片EPF10KLC84...
数字秒表的VHDL设计,能精确到百分秒,在6位数码管上显示,分别有秒,分,小时,通过目标芯片EPF10KLC84-4验证-VHDL design of digital stopwatch, accurate to the percentage of seconds in the six digital tube display, respectively, have seconds, minutes, hours, through the target chips EPF10KLC84-4 verification
- 2022-07-20 17:58:12下载
- 积分:1
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100例VHDL语言解释,北京理工大学毕业…
VHDL语言100例详解,北京理工大学ASIC研究生出版,这里是51~94个examples-VHDL language of 100 cases explain, Beijing Institute of Technology, Graduate ASIC publication, here is the 51 ~ 94 examples
- 2022-04-16 00:12:16下载
- 积分:1
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LDPC-long40rate0.5-encode-and-decode
LDPC的短码,码长为40速率为0.5的LDPC码的设计,用的是QC矩阵,压缩文件为原码部分,工程太大传不上去。(LDPC short code, a code length of 40 rate of 0.5 LDPC code design, using a QC matrix, the compressed file is part of the original code, do not pass up the works too.)
- 2013-07-01 09:28:47下载
- 积分:1
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verilog ADPLL file with testbench
verilog ADPLL file with testbench
- 2022-04-20 22:45:21下载
- 积分:1
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OQPSK_fading
OQPSK在AWGN和频率选择性衰落信道中的仿真(OQPSK the AWGN and frequency selective fading channel simulation)
- 2021-04-05 21:49:03下载
- 积分:1
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interpolate4
调制信号后4倍内插的verilog代码,用于基带成型滤波器输入数据(4 times after modulation signal interpolation verilog code, used to baseband shaping filter input data)
- 2017-04-20 15:52:09下载
- 积分:1
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基于 FPGA 的乒乓游戏
该项目实现了在Altera FPGA中的乒乓球比赛。游戏控制器是建立在FPGA中。玩家使用它连接到FPGA开发板玩的游戏键盘。本场比赛显示VGA屏幕上。所有部件,如键盘,VGA屏幕是由控制装置控制。
- 2022-03-28 19:03:27下载
- 积分:1
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v5_emac
以太网的FPGA程序实现以太网的FPGA程序实现以太网的FPGA程序实现(enternet verilog fpga)
- 2013-12-15 23:08:11下载
- 积分:1
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CCD_Verilog_1014
基于CPLD器件的线型CCD东芝TCD1501的驱动程序,用verilog语言开发。(CPLD devices based on linear CCD driver Toshiba TCD1501 using Verilog language development.)
- 2016-04-24 12:52:19下载
- 积分:1