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WCDMA_DPD
WCDMA数字直放站中数字预失真研究及其FPGA实现(WCDMA Digital Repeater digital pre-distortion and its FPGA implementation)
- 2011-10-16 19:24:50下载
- 积分：1
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CSC_mat
彩色空间转换，RGB和YUV互转的matlab源码(RGB converting to YUV, YUV converting to RGB, Matlab source code)
- 2014-12-24 10:15:57下载
- 积分：1
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DDS
文利用直接数字频率合成器(DDS)与CPLD技术和单片机控制技术，研制和
设计了高分辨率、高稳定度的函数信号发生(Wen using direct digital frequency synthesizer (DDS) and CPLD technology and single-chip microcomputer control technology, development and
Design of high resolution, high stability function of the signal
)
- 2013-08-27 14:20:22下载
- 积分：1
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xilinx_lib.tar
用于modelsim仿真的xilinxfpga平台IP库，以ise 13.x为基础制作，在modelsim10下验证通过。(xilinx IP core library for modelsim simulate, based on ise 13.x, verified in modelsim10.)
- 2017-10-27 12:23:53下载
- 积分：1
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这是led流水灯的vhdl描述，很好的啊
这是led流水灯的vhdl描述，很好的啊-led s hdl describe
- 2022-07-02 00:45:42下载
- 积分：1
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通用存储器VHDL代码库,The Free IP Project VHDL Free
通用存储器VHDL代码库,The Free IP Project VHDL Free-FIFO, Quartus standard library.
-generic VHDL code for memory, The Free Project VHDL IP Free-FIFO, Quartus standard library.
- 2022-05-26 21:22:15下载
- 积分：1
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uart01
一种实现计算机接口rs232与FPGA通信的基于VHDL语言设计的一段非常简洁的程序(A RS232 computer interface implementation with FPGA-based VHDL language communications designed a very simple procedure)
- 2009-03-15 23:13:42下载
- 积分：1
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IEEE 802.3 Cyclic Redundancy Check参考设计，xilinx提供
IEEE 802.3 Cyclic Redundancy Check参考设计，xilinx提供-IEEE 802.3 Cyclic Redundancy Check reference design for Xilinx
- 2023-02-15 07:55:03下载
- 积分：1
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20190718
uart implementation and documentation, this describes the basic steps in building your own uart module on verilog and programming them on an fpga device
- 2020-06-21 21:40:01下载
- 积分：1
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soft for changing Verilog code to c++ code ,c code
将Verilog代码转换成C++代码的软件，C源代码。-soft for changing Verilog code to c++ code ,c code
- 2022-01-24 14:30:24下载
- 积分：1
