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processor
processor design istruction load pipeline ,hazard
- 2010-04-02 03:52:08下载
- 积分:1
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ds18b20
说明: ds18b20的Verilog程序,经测试验证可以使用。注意此版本为DALLS DS18B20而不是DS1820,注意加5K上拉电阻。(ds18b20 the Verilog process can be used to verify by testing. Note that this version rather than DALLS DS18B20 for DS1820, the attention of Canadian 5K pull-up resistor.)
- 2020-10-29 11:09:56下载
- 积分:1
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bayer_3RGB_interpolation
一个基于FPGA用verilogHDL设计的bayer格式转RGB格式的模块,本人设计(a code used for bayer_3RGB_interpolation ,which based on FPGA by verilogHDL)
- 2011-12-25 21:58:05下载
- 积分:1
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IDT7005
双端口静态RAM的VHDL程序,具体芯片型号为IDT7005(DUAL-PORT
STATIC RAM)
- 2014-04-03 11:40:53下载
- 积分:1
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Modelsim_SDRAM
本实例用于SDRAM完成读写功能:
先向SDRAM里面写数据,然后再将数据读出来做比较,如果不匹配就通过LED变亮显示出来,如果一致,LED就不亮。(The examples for SDRAM read and write functions.)
- 2013-02-06 10:38:14下载
- 积分:1
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0_09_uart_tx
说明: 在FPGA板卡上面,通过单个按键实现串口的发送功能,带仿真需要自行修改一下工程配置(On the FPGA board, the sending function of the serial port is realized by a single key, and the engineering configuration needs to be modified by the simulation)
- 2020-03-26 08:40:39下载
- 积分:1
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基于FPGA的UART功能实现
基于FPGA的UART功能实现,包含四个模块,波特率产生,顶层,发送和产生模块。
- 2023-09-08 04:55:04下载
- 积分:1
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verilog入门小程序
FPGA的简单程序,关于有限状态机的设计与实现,可以让大家快速地对verilog开发有基本的认知
- 2022-05-25 15:25:12下载
- 积分:1
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8_BUS
BUS documentation and map reffereces
- 2020-06-25 19:40:02下载
- 积分:1
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frequency
数字频率计,测量范围0-1GHZ,测周测频自动转换,精度极高,花了很长时间,不过还是有一点点小问题,有待改进.(Digital frequency meter, range 0-1GHZ, automatic conversion measured weekly frequency measurement, high precision, took a long time, but still a little small problems to be improved.)
- 2011-08-11 00:51:18下载
- 积分:1