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application vhdl language adder design, compared with the design, With vhdl lang...
应用vhdl语言进行加法器的设计,比较器的设计,随着vhdl语言的应用越来越广泛,其重要性也更加明确。希望对大家有所帮助。-application vhdl language adder design, compared with the design, With vhdl language widely used, the importance of which was more explicit. We want to help.
- 2022-04-16 15:59:21下载
- 积分:1
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4-16.doc
4-16译码器,用VHDL编写的,可以直接下载到可编程逻辑器件中(4-16 decoder, written with VHDL, can be directly downloaded to the programmable logic device)
- 2010-11-24 15:13:14下载
- 积分:1
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频率计,VERILOG代码,含详细 中文注释.
频率计,VERILOG代码,含详细 中文注释.-Cymometer, VERILOG code, containing a detailed Chinese Notes.
- 2023-05-22 17:20:02下载
- 积分:1
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single_phase_inverter_wangyafankui
带有电网电压反馈的单相PWM整流器反馈,输出的波形很好,适合初学者学习观摩(With power grid voltage feedback single-phase PWM rectifier feedback, the output waveform is very good, suitable for beginners learning view
)
- 2012-11-30 16:16:04下载
- 积分:1
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密码锁
设计一个具有较高安全性和较低成本的通用电子密码锁,其具体功能要求如下: (1) 数码输入:每按下一个数字键:就输入一个数值,并在显示器上的最右方显示出该数值,同时将先前输入的数据依序左移一个数字位臵 (2) 数码清除:按下此键可清除前面所有的输入值,清除成为“0000”。 (3) 密码更改:按下此键时会将目前的数字设定成新的密码。 (4) 激活电锁:按下此键可将密码锁上锁。 (5) 解除电锁:按下此键会检查输入的密码是否正确,密码正确即开锁。
- 2022-03-20 08:56:07下载
- 积分:1
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fir_512_378_mux
512阶高速FIR成型滤波器,四相位复用,树形加法和多级流水线结构。(512-order high-speed FIR shaping filter, four-phase re-use, tree addition and multi-stage pipeline structure.)
- 2009-10-14 18:25:24下载
- 积分:1
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line_four
利用verilog HDL逐点比较法实现直线和圆弧插补(Use verilog HDL by-point comparison method to achieve linear and circular interpolation)
- 2020-12-01 14:59:27下载
- 积分:1
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FFT的VHDL代码
FFT VHDL code
- 2022-08-24 16:05:15下载
- 积分:1
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Marquee with a program written in VHDL, and 60 binary counter program, one desig...
一个用VHDL编写的跑马灯程序和60进制计数器的程序,一个是自己设计的一个是老师要求,都在实验箱上验证成功,希望对大家有所帮助。-Marquee with a program written in VHDL, and 60 binary counter program, one designed by one teacher asked, are in the experimental boxes proved to be successful, want to help everyone.
- 2022-08-10 07:53:33下载
- 积分:1
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interpolation_shaping_filter
内插成型滤波器的FPGA实现,可根据需要配置不同的内插倍数,Quarter II环境编译,可直接使用(Interpolation shaping filter FPGA, can be equipped with different interpolation factor, Quarter II compiler environment, can be used directly)
- 2013-11-12 21:13:46下载
- 积分:1