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Continuous_delay_control_Farrow
matlab代码,利用Farrow结构设计分数延时滤波器,滤波器阶数和个数可分别进行设置,利用最大最小准则近似(Matlab code, using Farrow structure design fractional delay filter, filter order and number can be set separately, using the maximum and minimum criterion approximation.)
- 2019-06-14 09:10:59下载
- 积分:1
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CPLD
控制三相步进电机及光电编码器的采集,当电机停止时,保证三相里面只有一相相通,防止停止时电流过大.(Control three-phase stepper motor and optical encoder collection, when the motor stops to ensure that only one phase of three-phase inside the heart, and to prevent too much current is stopped.)
- 2008-05-26 11:37:38下载
- 积分:1
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CPLD总线Verilog HDL代码,PLD
CPLD的VerilogHDL总线代码,在EPM7128SLC84-10+Quartus4平台上运行通过.-CPLD bus Verilog HDL code, the PLD-10 Quartus4 platform to run through.
- 2022-01-26 04:10:04下载
- 积分:1
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design through verilog hdl
design through verilog hdl
- 2023-04-07 06:25:04下载
- 积分:1
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The code is used to interface PC monitor with Spartan 3E for the display. if you...
The code is used to interface PC monitor with Spartan 3E for the display. if you run the program on spartan 3 you would be able to see different test pattern on the monitor screen
- 2022-10-03 00:10:03下载
- 积分:1
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DA
说明: DOCUMENT ON DISTRIBUTED ARITHMATIC
- 2014-02-05 17:06:51下载
- 积分:1
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实现控制8x8点阵动态显示字母的程序
基于CPLD的实现控制8x8点阵动态显示字母的程序,使用VHDL语言,通过调节分频系数可以实现点阵的变换速度,通过改变不同的状态可以让点阵显示不同的图案。
- 2022-03-19 00:46:52下载
- 积分:1
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Description Sramoc (K, M) said the figures used in 0,1,2 ..., K
描述
Sramoc ( K , M ) 表示用数字0、1、2…、K-1组成的自然数中能被M整除的最小数。给定 K、M,求Sramoc ( K,M )。例如 K=2,M=7的时候,Sramoc( 2 , 7 ) = 1001。
输入
第一行为两个整数K、M满足2
- 2022-05-25 16:18:18下载
- 积分:1
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全数字锁相环的verilog源代码
全数字锁相环的verilog源代码-全数字锁相环的verilog源代码
- 2023-04-30 22:20:03下载
- 积分:1
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PS2 source VHDL, and can be connected directly to the computer. So the mouse, ke...
PS2的源代码VHDL语言实现,可以和计算机直接连接.做鼠标键盘接口.-PS2 source VHDL, and can be connected directly to the computer. So the mouse, keyboard interface.
- 2022-11-10 10:10:04下载
- 积分:1