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061110061
在quartus平台下使用verilog语言编程实现简单的单流水线CPU，可以执行16条基本指令(Quartus platform in the verilog language programming using a simple single-line CPU, can perform 16 basic instructions)
- 2010-05-21 20:01:16下载
- 积分：1
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FFT_64points
64点的 FFT verilog,它是串行计算的，工作频率不到100M，计算速率很高，里面的层次很清晰。(64-point FFT verilog serial computing, the operating frequency of less than 100M, the calculated rate is high, the level inside is very clear.)
- 2021-04-03 11:29:07下载
- 积分：1
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uart_byte_rx
libero soc工程，实现通过串口接收到单字节数据后并返回发送给上位机(Libero SOC project, which realizes receiving single byte data through serial port and sending it back to host computer)
- 2020-06-21 09:20:01下载
- 积分：1
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RS-422standardmodulev2
rs422标准通讯模块 异步收发 verilog语言编写(rs422 standard communication module asynchronous receiver verilog language)
- 2013-12-23 14:14:18下载
- 积分：1
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capture-using-SCCB-and-FPGA
利用SCCB和FPGA实现视频采集的论文，对相关开发人员具有很强的参考价值！
(FPGA implementation using the SCCB and video collection of the papers, the relevant developer has a strong reference value !
)
- 2013-09-29 15:37:52下载
- 积分：1
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ISCAS`89基准电路下载（包括Verilog和VHDL格式）
SCAS `89 基准电路下载，包括Verilog和VHDL格式。verilog格式30个文件：包括S1238、S13207等;(SCAS `89 benchmark circuit downloads, including Verilog and VHDL formats. Verilog format 30 files: including S1238, S13207 and so on;)
- 2021-01-02 15:58:56下载
- 积分：1
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eetop.cn_16bits_multiplier
16位并行乘法器源代码，booth2编码，二进制树拓扑结构(16bits parallel multiplier source code
)
- 2020-12-24 20:59:05下载
- 积分：1
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FPGA开发全攻略
FPGA设计攻略及流程，包含时序收敛和引脚约束(FPGA design strategy and process, including time series convergence and pin constraints)
- 2017-12-12 16:30:52下载
- 积分：1
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responder3
基于VHDL的多路抢答器，用LCD12864进行显示(Multiplex answering device based on VHDL is displayed with LCD12864)
- 2019-06-17 15:29:31下载
- 积分：1
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在vhdl开发环境下，关于协议PS2 verilog 源码
在vhdl开发环境下，关于协议PS2 verilog 源码-In VHDL development environment, with regard to the agreement PS2 verilog source code
- 2022-05-06 00:46:27下载
- 积分：1
