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Copy-of-DIGITAL-VLSI-DESIGN
a manual for design implementation of fpga and ASIC using verilog
- 2012-09-04 17:34:58下载
- 积分:1
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Chebyshev-filter
利用matlab设计了一个切比雪夫滤波器,并且对滤波器性能进行了仿真分析。(Using the matlab design a chebyshev filter, and has carried on the simulation analysis on filter performance.
)
- 2013-09-05 20:04:36下载
- 积分:1
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14_SDRAM
说明: 高速流水的SDRAM控制器,最高速度可达速度在200M左右(high speed SDRAM controller)
- 2019-06-17 18:43:54下载
- 积分:1
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1
说明: 基于FPGA的USB接口设计,实现了USB与FPGA的通信(USB interface to FPGA-based design, implementation of the USB communication with the FPGA)
- 2011-02-21 15:50:27下载
- 积分:1
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Toplevel VHDL Structural model of a system containing 8051
Toplevel VHDL Structural model of a system containing 8051
-Toplevel VHDL Structural model of a system containing 8051
- 2022-11-19 06:20:03下载
- 积分:1
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DDSa
程序是完整的一个数字下变频器的一个Verilog程序,经测试可以使用,欢迎下载(Program is a complete Verilog program a digital down converter, tested can be used, please download)
- 2016-05-23 22:11:25下载
- 积分:1
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MAC_TxScheduler
Ethernet MAC-MII interface of Transmit
- 2014-02-15 00:35:25下载
- 积分:1
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16*16点阵显示”北京欢迎"
提供2个VHDL程序实现键盘显示的功能,第一个是16*16点阵显示“北京欢迎”,用VHDL语言编程实现,串烧在单片机实验工具箱上,让单片机点阵键盘上依次显示“北京欢迎”的字样。另附有LED数码管循环显示0~9数字的VHDL程序 ,成功串烧后,键盘上连续显示0~9这10个数字。
- 2022-08-03 09:36:55下载
- 积分:1
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divf_even
基于FPGA cyclone2的偶数分频模块,可实现自定义分频数(Based on FPGA cyclone2
even number of frequency divider module, custom frequency divider can be realized.)
- 2018-11-06 12:11:46下载
- 积分:1
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CProgrammingforabsolutebeginners_WeLearnFree
ebook verilog HDL programming book
- 2015-12-04 14:39:40下载
- 积分:1