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基于fpga和xinlinx ise 的7段码led显示程序,希望对你有所帮助
基于fpga和xinlinx ise 的7段码led显示程序,希望对你有所帮助-and ideally xinlinx 7 of the code led display program, and I hope to help you
- 2022-02-03 23:57:12下载
- 积分:1
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StepMotor_CurrentLoop
实现二项混合式步进电机的驱动,和步进电机的细分程序。(The driving of binomial hybrid stepper motor and the subdivision program of stepper motor are realized.)
- 2020-06-21 02:20:01下载
- 积分:1
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verilog代码uart传输
通过UART进行的低功耗低成本的数据传输TEQ再检查一下它,一旦它的writen用Verilog语言而且它是基于一个协议,你要指定更好的沟通自己的规则
- 2022-01-30 23:50:40下载
- 积分:1
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qam_64
64QAM调制,采用硬件语言verilog实现,其中调用了DDS的IP核(64QAM modulation, using language verilog hardware implementation, which is called the IP core of the DDS)
- 2021-03-02 23:29:33下载
- 积分:1
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clock_smg
自己做的数码管显示的时钟 一个非常简单的FPGA时钟 用累加做的(To do their own digital display clock of the FPGA clock is a very simple to do with the cumulative)
- 2011-09-27 21:07:54下载
- 积分:1
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地铁售票系统,基于VHDL,可实现站点设置,站点选择,选择购票数量,找零等一系列功能。...
地铁售票系统,基于VHDL,可实现站点设置,站点选择,选择购票数量,找零等一系列功能。-Metro ticketing system, based on VHDL, allows site settings, site selection, choose the number of tickets, Keep the change and a series of functions.
- 2022-02-16 02:43:18下载
- 积分:1
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verilog
说明: verilog开发的经典教材,详细介绍了语法,常见历程,以及通用的程序段(verilog development of the classic materials, detailed information on syntax, common history, as well as the common program segment)
- 2010-03-18 12:11:18下载
- 积分:1
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加法器(使用verilog编写的),虽然简单,但是这也是学习verilog最基础的东西!希望大家一起学习!...
加法器(使用verilog编写的),虽然简单,但是这也是学习verilog最基础的东西!希望大家一起学习!-The accumulator (uses the verilog compilation), although it is simple, but this also is studies most foundation of the verilog! Hopes everybody studies together!
- 2023-07-08 05:35:13下载
- 积分:1
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multiplier_interface
verilog 写的工程,是个基于流水线的乘法器(verilog write the works, is based on a pipelined multiplier)
- 2012-09-21 10:04:54下载
- 积分:1
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这是一个语音程序,通过VHDL编译了.大家可以直接调用.其中还包括了键盘程序有需要可以下来...
这是一个语音程序,通过VHDL编译了.大家可以直接调用.其中还包括了键盘程序有需要可以下来-This a voice procedures, through a VHDL compiler. you can directly call. It also includes a keyboard procedures need to look at it down
- 2022-06-13 01:51:36下载
- 积分:1