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shizhong
VHDL写时钟，分频模块什么，实现计时。定点报时，定点闹钟，显示年月日。(verilog HDL)
- 2014-01-09 18:29:40下载
- 积分：1
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mmuart
说明： 简单uart，verilog语言编写，已经经过测试，有需要的可以看看(Simple uart, Verilog language, has been tested, you can see if you need it)
- 2020-06-23 20:00:01下载
- 积分：1
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061110061
在quartus平台下使用verilog语言编程实现简单的单流水线CPU，可以执行16条基本指令(Quartus platform in the verilog language programming using a simple single-line CPU, can perform 16 basic instructions)
- 2010-05-21 20:01:16下载
- 积分：1
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pong_C5H
FPGA的经典例程，可以进行移植和借鉴使用(FPGA' s classic routines, can be transplanted and learn to use)
- 2011-07-23 10:15:41下载
- 积分：1
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shift example
shift example for verilog
- 2018-12-18 05:24:04下载
- 积分：1
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Project12112011
Program for Code Gerneration
- 2011-11-13 19:14:08下载
- 积分：1
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Verilog-Files---551
Programmable IIR Filter written in Verilog and its respective modules.
- 2014-05-30 03:46:09下载
- 积分：1
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FloatPoint Arithmetic
Float Point Add, Multiply, and Divide arithmetic. You can change and modify the add block and reuse it in FPGA or ASIC chip. The running clock is dependent of the technology you used in the ASIC.
- 2022-06-13 03:38:57下载
- 积分：1
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sdram-source
SDR SDRAM 控制器的源代码 altera公司的(source code from altera)
- 2010-06-09 19:35:03下载
- 积分：1
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RISC-V-Reader-Chinese-v2p1
说明： RISC-V 芯片设计规范,很有参考价值，开源芯片设计必备参考资料，希望对大家有帮助。(The RISC-V Foundation is chartered to standardize and promote the open RISC-V instruction set architecture)
- 2020-07-01 23:00:02下载
- 积分：1
