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页面置换算法中的三种算法相关程序代码
FIFO LUR OPT
页面置换算法中的三种算法相关程序代码
FIFO LUR OPT-yemianzhihuansuanfa
- 2022-10-19 08:10:03下载
- 积分：1
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ROM的4位的话。
4 bit ROM for Quartus
- 2022-01-30 19:14:13下载
- 积分：1
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SD_rtl
用verilog实现sd卡读写，亲测可用(Implementation of SD card read and write with Verilog)
- 2020-12-27 21:49:02下载
- 积分：1
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JOP内核字节码获取，很难找的东东，呕血之作
JOP内核字节码获取，很难找的东东，呕血之作-JOP core byte code access, it is difficult to find the price. Zhi for hematemesis
- 2023-01-27 11:00:03下载
- 积分：1
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detailed spec for Xilinx V5 FPGA, reference for programming of FPGA, system desi...
detailed spec for Xilinx V5 FPGA, reference for programming of FPGA, system designer or ASIC designer.
- 2022-04-24 22:44:35下载
- 积分：1
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all passed, I was carefully designed, fully meet the requirements of beginners....
全部通过，是我的精心设计，完全满足初学者的要求。0-99自动记数-all passed, I was carefully designed, fully meet the requirements of beginners. 0-99 automatic counting
- 2022-05-05 06:11:20下载
- 积分：1
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fft1024-verilogCODE
fft 1024点verilog代码,适用于基-4的FFT算法描述，使用quartus，modelsim，(fftpoint 1024 verilog code)
- 2020-12-19 01:59:10下载
- 积分：1
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程序是用硬件描述语言（VHDL）实现：4×4键…
程序主要是用硬件描述语言（VHDL）实现：
4*4键盘扫描，简洁明了，通俗易懂，比较适合VHDL初学者-procedure was used in hardware description language (VHDL) to achieve : 4* 4 keyboard scan, concise, easily understood and more suitable for beginners VHDL
- 2022-01-31 18:02:15下载
- 积分：1
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这是一个GPIB源程序代码,里面有硬件相对应的代码
这是一个GPIB源程序代码,里面有硬件相对应的代码-This is a GPIB source code, which corresponds to a hardware code
- 2022-02-15 23:31:46下载
- 积分：1
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ddr_for_controller_and_phy
说明： 这是本人曾经参与的一个DDR controller接口项目，主要是FPGA rtl实现，仅供参考。(This is a DDR controller interface project that I once participated in, mainly implemented by FPGA RTL, for reference only.)
- 2020-12-21 20:59:08下载
- 积分：1
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