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二维高斯实现的Vhdl代码
这段代码是用来实现二维高斯滤波器的。
- 2022-01-25 17:27:16下载
- 积分：1
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shukongfenpinqi
数控分频器的设计
数控分频器的功能就是当在输入端给定不同输入数据时，将对输入的时钟信号有不同的分频比，例3的数控分频器就是用计数值可并行预置的加法计数器设计完成的，方法是将计数溢出位与预置数加载输入信号相接即可。(NC NC divider divider design of its function is when the input given different input data, input the clock signal will have different frequency than, for example 3 is to use the NC prescaler count preset value of the adder parallel counter design is completed, the method is to count the number of overflow bit with preset load to the input signal phase.)
- 2008-12-13 09:56:51下载
- 积分：1
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VerilogHDL,对初学者很有帮助的,可以一下的!
VerilogHDL,对初学者很有帮助的,可以一下的!-VerilogHDL, very helpful for beginners, you can look in!
- 2023-02-06 11:05:03下载
- 积分：1
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8_BUS
说明： BUS documentation and map reffereces
- 2020-06-25 19:40:02下载
- 积分：1
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Coding Styles for if Statements and case Statements
Coding Styles for if Statements and case Statements
- 2022-02-09 23:54:06下载
- 积分：1
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cordic
CORDIC(Coordinate Rotation Digital Computer)算法即坐标旋转数字计算方法。 CORDIC算法,能够通过平移和累加快速实现基础的数学函数,包括三角函数,开方,指数,对数,平方根等函数。(CORDIC (Coordinate Rotation Digital Computer) algorithm for the coordinate rotation digital calculation. CORDIC algorithm can be achieved through the rapid translation and accumulation based on mathematical functions, including trigonometric, square root, exponential, logarithmic, square root and other functions.)
- 2020-06-29 13:40:02下载
- 积分：1
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一个PS2 IP CORE(VHDL) for FPGA
一个PS2 IP CORE(VHDL) for FPGA-A PS2 IP CORE (VHDL) for FPGA
- 2022-09-04 02:20:03下载
- 积分：1
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ModelSim.SE.v6.0-ROR
modelsim crack versin 6
- 2009-04-30 02:23:21下载
- 积分：1
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Vending-Machine-using-Moore
Vending Machine simulation using Moore sequence
- 2016-05-30 08:24:35下载
- 积分：1
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UART_FIFO
FPGA，串口调试程序，接收模块，含FIFO IP核(FPGA uFF0C u4E32 u53E3 u8C03 u8BD5 u7A0B u5E8F uFF0C u63A5 u6536 u6A21 u5757 uFF0C u542BFIFO IP u6838)
- 2021-05-07 16:22:36下载
- 积分：1
