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ram
代码实现了一个由32位寄存器组成的寄存器组，并有多个控制输入和两个输出，方便使用。(The code implements a 32-bit register consisting of registers, and there are multiple control inputs and two outputs, easy to use.)
- 2009-10-23 16:09:44下载
- 积分：1
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ch3ex
部分组合逻辑数字电路的VHDL代码，包含必要的功能描述(Some combinational logic digital circuits VHDL code, containing the necessary functional description)
- 2009-01-31 21:26:34下载
- 积分：1
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my_uart
一个简单的UART串口程序，能实现数据的发送与接收，但没有奇偶校验等验证数据传输是否正确。(A simple UART serial program, can send and receive data, but there is no parity and other validation data is correct.)
- 2011-08-17 20:48:11下载
- 积分：1
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grlib-gpl-1.1.0-b4108
gaisler公司在2011年发布的的leon3的源代码！(source code of leon3 )
- 2012-05-12 00:12:20下载
- 积分：1
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FPGA-基于fpga的PWM
一段很好地讲述PWM的VHDL硬件代码，可以在不同SOPC上运行实现
- 2022-01-30 19:23:51下载
- 积分：1
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官方的RS232例程详细Altera非常实用
altera 官方rs232例程 很详细很实用-official rs232 routines in great detail altera very practical
- 2023-04-15 09:15:03下载
- 积分：1
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16QAM
16QAM调制解调程序画出时域波形、 正交分量、同相分量波形，眼图，散点图等(16QAM modulation and demodulation process to draw time-domain waveform, quadrature components, in-phase component waveforms, eye diagrams, scatter plots, etc.)
- 2013-06-04 22:10:41下载
- 积分：1
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源实现YUV到RGB的转换
THE SOURCE REALIZE THE TRANSFORMATION FROM YUV TO RGB
- 2022-06-16 04:19:46下载
- 积分：1
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Block-cipher-lock
密码锁verilog源代码，包括四个七段数码管显示模块，设置密码以及输入密码校验模块(Password lock Verilog source code, including four of seven digital tube display module, set the password and password verification module)
- 2014-01-11 23:57:19下载
- 积分：1
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comp
The red arrow showed the output became 8 when the measured temperature changed to 11°C. As shown by black arrow, the maximum output was 28. The program was run according to the proposed method.
- 2012-06-05 23:16:25下载
- 积分：1
