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This is a verilog file which is used as a decoder
This a verilog file which is used as a decoder-This is a verilog file which is used as a decoder
- 2023-02-17 15:15:04下载
- 积分:1
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VGA
本科毕业设计,简易逻辑分析仪,重点在于用CPLD搭建显卡,输出VGA信号驱动显示器显示逻辑波形(A design for LA,use cpld to generate VGA signals.)
- 2014-04-28 11:22:01下载
- 积分:1
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Риторика_Зачетная работа
access must be conf urr arr
- 2019-05-29 20:23:53下载
- 积分:1
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iic_sci
FPGA编程,经过团体奋战完成,全是底层的IIc和sci通信,完整版。(FPGA programming, after groups fight to the finish, all underlying SCI and IIc communication, full version)
- 2014-12-23 09:32:54下载
- 积分:1
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Tutorijal 6
说明: Ovo sto saljem je tutorijal 7 sa vhdlom
- 2018-12-22 06:47:31下载
- 积分:1
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CYUSB3.0
USB3.0开发板资料,采用CYUSB3.0(USB3.0 development board, using CYUSB3.0)
- 2014-02-18 08:19:00下载
- 积分:1
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CH4CH2CH1VHDL 数字电路参考书所有程序9
CH4CH2CH1VHDL 数字电路参考书所有程序9-CH4CH2CH1VHDL digital circuit reference all proceedings 9
- 2022-11-24 11:15:04下载
- 积分:1
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这个代码是Verilog HDL。
this Code is in verilog HDL.
This Code is for piplined processor with 4 opcode.
this will work in three cycle latch, decode and exicute..
test bench for xilinx ise is laos given
- 2022-02-12 09:39:12下载
- 积分:1
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DDS FPGA开发下的verilog源代码
DDS_AD9854_for FPGA ,FPGA开发下的verilog源代码,信号发生器(DDS_AD9854_for FPGA, verilog source code, signal generator.)
- 2013-01-14 00:13:36下载
- 积分:1
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shouhuoji.vhd
自动售货机程序(Vending machine procedures)
- 2008-04-05 22:08:58下载
- 积分:1