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fwwallace
wallace tree multiplier in verrilog
- 2013-03-19 00:15:07下载
- 积分：1
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irig_b
用来实现IRIG_B码的解码程序，在XILINX ISE上运行过没有问题，(Used to achieve IRIG_B code decoding process, in XILINX ISE run-off is no problem,)
- 2021-04-06 14:49:03下载
- 积分：1
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TMDXEVM6678L_EVM_A101-1_GBR
TMS320C6678 EVM TMS320C6678 EVM GOOD(TMS320C6678 EVM GOOD TMS320C6678 EVM GOOD)
- 2013-08-15 08:50:26下载
- 积分：1
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This program is Verlog language program, using QUARTUS6.0 preparation, program i...
本程序为Verlog语言程序，采用QUARTUS6.0编写，程序实现的功能是控制AD2S80的转换和和数据总线上数据的读取-This program is Verlog language program, using QUARTUS6.0 preparation, program implementation function is to control the conversion and AD2S80 and data bus to read data
- 2022-02-10 16:51:45下载
- 积分：1
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Applicable to FPGA
适用于FPGA的SOPC方面的元器件添加，如COMPNENT-Applicable to FPGA-SOPC area to add components, such as COMPNENT
- 2023-06-11 11:30:03下载
- 积分：1
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8253
8253可编程定时器/计数器芯片 VeriLog实现(8253 programmable timer/counter chip VeriLog achieve)
- 2013-05-31 20:40:23下载
- 积分：1
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串口程序，基于VHDL 的，很好的程序
快下吧
串口程序，基于VHDL 的，很好的程序
快下吧-Serial procedures, based on VHDL, and a very good program, are you fast
- 2022-02-04 10:08:53下载
- 积分：1
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hamid
very nice program that i ensure anyone can use easily and will be efficient for hard project of elevator
- 2009-07-26 13:27:38下载
- 积分：1
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weitb
在数字通信中，通常直接从接收到的数字信号中提取位同步信号，这种直接法按其提取同步信号的方式，大致可分为滤波法和锁相法。锁相法是指利用锁相环来提取位同步信号的方法，本设计方案就是基于锁相环的位同步提取方法，能够比较快速地提取位同步时钟，并且设计简单，方便修改参数。采用Quartus II设计软件对系统进行了仿真试验，并用Altera的Cyclone II系列FPGA芯片Ep2c5予以实现。(In digital communication, usually from receiving directly in digital signal extracted a synchronized signal, the direct method according to the extraction synchronized signal way, can be roughly divided into filtering method and phase lock method. Phase lock method is using of phase locked loop to extract a synchronized signal method, the design scheme is based on phase locked loop of a synchronous extraction method and can be quickly extract a synchronous clock, and design simple, convenient modification parameter. The Quartus II design software of the system, and the simulation test Altera Cyclone II FPGA chip to achieve Ep2c5 series.)
- 2020-12-01 10:39:28下载
- 积分：1
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alu
this file is vhdl code of alu
- 2016-05-29 16:35:58下载
- 积分：1
