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1024位RSA加密算法
RSA算法的描述 选取长度应该相等的两个大素数p和q,计算其乘积: n = pq 然后随机选取加密密钥e,使e和(p–1)(q–1)互素。 最后用欧几里德扩展算法计算解密密钥d,以满足 ed = 1(mod(p–1)(q–1)) 即 d = e–1 mod((p–1)(q–1)) e和n是公钥,d是私钥
- 2022-03-21 11:09:07下载
- 积分:1
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FPGAm序列发生器
以DE2板子为开发平台,采用Verilog语言编程,实现了跳频通信中常用的扩频序列m编码的输出,设计采用Modelsim以及Quartus II自带逻辑分析仪验证设计的正确性,此设计已经用在某工程中,测试结果性能良好。
- 2022-02-14 04:13:22下载
- 积分:1
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huawei_verilog
huawei代码编码规范,包含基本的verilog的语法等编码规范,业界经典(Huawei code coding specification, including the basic syntax of the Verilog code, the industry classic)
- 2016-03-15 20:02:57下载
- 积分:1
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CfgDDS_9910
dds ad9910配置的verilog hdl程序,模块化设计,输入待配置的数据,字长,启动信号,即可自动产生时序,完成一次配置,模块还有done握手信号,方便用户调用时,反复多次配置。(dds ad9910 configuration verilog hdl program, modular design, the input data to be configured, word length, the start signal, the timing can be automatically generated, complete a configuration, the module has done handshake, user-friendly call, repeatedly configuration .)
- 2015-04-21 22:03:50下载
- 积分:1
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ADS822E
ad转换器ads822e/ads822的驱动模块(AD converter ads822e/ads822 driver module)
- 2021-04-23 22:28:48下载
- 积分:1
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Add_sub_struc
8位加减器,八位减法器与加法器,用过一个控制端可以自由变换,采用移位加法方式,用途广泛,利用减法位补码加法的理论实现。(8 addition and subtraction, eight subtractor and adder, used a control terminal can freely change the using Shift addition, a wide range of uses, the use of subtraction complement addition theory to achieve.)
- 2012-05-14 20:36:26下载
- 积分:1
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sm4
VHDL实现国家SM4加密算法(ECB)模式 (VHDL to achieve national SM4 encryption algorithm (ECB) mode)
- 2020-08-12 06:58:26下载
- 积分:1
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matlab程序
说明: OFDM信号的发送与接收 ,需要自取。时域图,模糊图,削峰。(Sending and receiving of OFDM signal)
- 2020-12-17 12:56:10下载
- 积分:1
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WM8731_WM8731L
wm8731音频编解码芯片使用介绍,该手册里面对该芯片进行了详细的描述,对各个单元模块也进行了详细的阐述(the handbook of WM8721/WM8731L)
- 2010-05-20 10:47:30下载
- 积分:1
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LATTICE_ASYNFIFO
LATTICE FPGA FIFO 程序例程,工程详细,全部源代码上传 (LATTICE FPGA FIFO routine, detailed engineering, all source code uploaded)
- 2013-09-09 11:10:01下载
- 积分:1